Introduction
With the rise of data-intensive services, smartphone power consumption has increased significantly, reducing standby time. To extend standby time, built-in batteries have become more common. Roughly half of a lithium battery's volume is occupied by its structural components; placing the battery inside the phone chassis saves that structural volume, allowing a substantial capacity increase for the same or larger device volume. While this increases battery capacity, it raises a new problem: if the smartphone software system freezes during use, how can a system reset be performed?
Compared with a product's main functions, mechanical reset devices intended to clear freezes are often rudimentary. To prevent accidental resets, most manual reset keys (if present) are hidden inside the chassis. Because the reset key is hard to access, removing the battery has become a common workaround. This approach provides poor user experience, increases cost, and may damage the system or cause important data loss.
How can a hardware reset be implemented in smartphones with built-in batteries? This article describes a hardware reset solution that supports a long-press dual-key reset and an integrated single-key power on/off and reset scheme commonly used in smartphone designs.
Power On/Off and Reset Mechanisms and Risks on Smartphone Platforms
Modern smartphone platforms typically use an application processor (AP) together with a power management unit (PMU).
In this architecture, the PMU provides a power switch pin that connects to a mechanical switch on the device chassis, commonly labeled Power_Key.
When the phone is off, pressing Power_Key pulls the PMU power switch pin low and starts the PMU power-up sequence. The PMU enables LDO regulators to power the AP and issues a hardware reset signal to the AP. After the AP software has completed startup, the AP drives a PS_HOLD signal to hold the PMU's PS_HOLD pin high and maintains it high during normal operation. If the AP fails to drive PS_HOLD high within a specified Tpshold interval, the PMU considers the AP boot to have failed and automatically powers down. Typically, Power_Key must remain asserted low until PS_HOLD is driven high, as illustrated in Figure 2. This requirement ensures that if the AP fails to initialize and does not assert PS_HOLD within Tpshold, keeping Power_Key low allows the PMU to be triggered for another power-up attempt, increasing the chance of a successful boot.
When the system is off, a short press of Power_Key triggers the PMU power-up. Once the AP has powered up and asserted PS_HOLD, the PS_HOLD line will be pulled high via R2/C1/R1 within Tpshold regardless of the key state, so power-up succeeds. When the system is on, pressing Power_Key pulls PS_HOLD low and the PMU begins a power-down sequence. The moment the key is released, the system may be in the middle of either the power-down or power-up sequence, producing an unpredictable outcome that could be a shutdown or a reset, which is unacceptable for product design. For this reason, in such circuit designs, Power_Key and S1 must not be combined on the same control node.
To address the lack of a dedicated hardware reset input on some PMUs, newer PMUs introduce a RESET_IN pin that allows external circuitry to issue a hardware reset to the PMU. However, many PMU specifications still require the power key and reset key to be physically separate, preventing a unified single-key power and reset implementation; the reset key is often hidden behind a maintenance hole and cannot serve as a single accessible key.
Is there a hardware solution that allows combining the power key and reset key into a single control while preserving correct behavior for both power on/off and reset in smartphone designs?
