Overview
Silicon carbide (SiC) is a compound of carbon and silicon that is widely regarded as an ideal material for high-temperature, high-frequency, and high-power, high-voltage semiconductor devices.
Key material advantages of silicon carbide include:
1. High-voltage capability:
SiC has lower impedance and a wider bandgap, which allows it to withstand higher currents and voltages while enabling smaller device designs and higher efficiency.
2. High-frequency performance:
SiC devices do not exhibit significant current tailing during turn-off, improving switching speed and making them suitable for higher-frequency, faster switching applications.
3. High-temperature tolerance:
Compared with silicon (Si), SiC has higher thermal conductivity and can operate at higher temperatures.
Compared with traditional silicon, silicon carbide shows significant advantages in bandgap, thermal conductivity, breakdown voltage, and electron saturation drift velocity. Specifically, SiC has a bandgap roughly three times that of Si, thermal conductivity about four to five times higher, breakdown voltage about eight to ten times greater, and electron saturation drift velocity about two to three times higher. These properties make SiC a promising semiconductor material with broad application potential.
SiC-based devices are categorized by substrate conductivity. Conductive SiC power devices are produced by growing epitaxial layers on conductive substrates and then processing the epitaxial wafers into Schottky diodes, MOSFETs, IGBTs, and similar devices for applications such as electric vehicles, photovoltaics, rail transit, data centers, and charging infrastructure. Semi-insulating SiC-based RF devices are produced by growing GaN epitaxial layers on semi-insulating SiC substrates to make GaN RF devices such as HEMTs, used in 5G communications, vehicular communications, defense, data links, and aerospace.
SiC Device Manufacturing Process
Manufacturing SiC semiconductor power devices involves a sequence of processes including single-crystal growth, ingot slicing, epitaxial growth, wafer fabrication, and packaging. After synthesizing SiC powder, ingots are grown, then sliced, ground, and polished to produce SiC substrates. Epitaxial layers are grown on the substrates, followed by photolithography, etching, ion implantation, metallization, and passivation to form SiC wafers. Wafers are then diced into dies, packaged into devices, and assembled into modules. The entire manufacturing process follows scientific and engineering principles.
Crystal growth is the most critical step for SiC substrate manufacturing because it determines the electrical properties of the substrate.
Common SiC crystal growth methods include physical vapor transport (PVT), high-temperature chemical vapor deposition (CVD), and top-seeded solution growth (TSSG). Large-scale industrial production predominantly uses the PVT method.
Key challenges in SiC crystal growth include:
1. Extremely tight control of temperature and pressure. Growth temperatures exceed 2300°C and pressure must be precisely controlled to ensure stable crystal growth.
2. Slow growth rate. It can take roughly seven days to grow a 2 cm SiC boule, which limits production throughput.
3. Strict requirements on crystal polytype and low yield. SiC has more than 200 polytypes, but only a few are suitable for semiconductor applications, requiring careful selection to ensure device quality and performance.
SiC substrates are classified as semi-insulating or conductive. Semi-insulating substrates achieve high resistivity by removing various impurities, especially shallow-level impurities. Conductive substrates achieve low resistivity by introducing nitrogen during crystal growth.
Single-crystal substrate processing includes shaping, slicing, wafer grinding, polishing, inspection, and cleaning to produce transparent or semi-transparent substrates with no damage layer and low surface roughness. Key technical challenges in crystal processing are slicing and thinning.
Slicing is the first step in SiC single-crystal processing and determines the difficulty of subsequent thinning and polishing. Reported SiC slicing technologies include bonded abrasive, loose abrasive slicing, laser cutting, cold separation, and wire electrical discharge machining. Reciprocating diamond-bonded multi-wire sawing is the most common method for SiC single-crystal slicing. However, SiC hardness requires extensive diamond wire and hours of processing, and up to 40% of the boule can be lost as SiC dust during slicing, resulting in a low wafer yield per boule and high device cost.
Thinning of SiC is mainly achieved by grinding and lapping, but low fracture toughness makes SiC prone to cracking during thinning, complicating wafer thinning. A common method is spin grinding, where the wafer is rotated while the spindle drives the grinding wheel and the wheel feeds downward to reduce thickness. While spin grinding improves throughput, grinding wheels can dull with prolonged use, causing short tool life and surface and subsurface damage to wafers. Current technical solutions include ultrasonic vibration-assisted grinding and in-process electrochemical dressing to extend wheel life and reduce damage.
Polishing of SiC wafers includes rough polishing and fine polishing. Rough polishing uses mechanical polishing to increase throughput and improve surface roughness. Fine polishing is typically single-side chemical mechanical polishing (CMP), the most widely used technique, which combines chemical etching and mechanical abrasion to remove surface material and achieve planarization.
CMP involves multiple disciplines such as chemistry, physics, tribology, mechanics, and materials science. Factors affecting polishing performance include slurry composition (abrasives, oxidants, pH, additives), polishing pad properties (hardness, elasticity, surface morphology), and process parameters (polishing pressure, platen/head speeds, slurry flow rate).
SiC epitaxy is the process of growing a single-crystal thin film on a SiC substrate using methods such as chemical vapor deposition (CVD), molecular beam epitaxy (MBE), liquid phase epitaxy (LPE), pulsed laser deposition (PLD), and sublimation techniques. For large-scale production, CVD is the dominant method.
SiC power-device manufacturing differs from silicon processes in that devices are not fabricated directly on bulk SiC; instead, a micron-scale epitaxial layer is grown on a polished SiC substrate. The epitaxial layer and substrate may be the same or different materials, referred to as homoepitaxy or heteroepitaxy. The epitaxial layer eliminates surface or subsurface defects introduced during crystal growth and processing, improving lattice order and surface morphology. Epitaxial quality critically affects final device performance. Different epitaxial thicknesses correspond to different voltage ratings; for example, about 1 μm of epitaxy corresponds to ~100 V, so a 600 V device typically requires an epitaxial thickness near 6 μm.
In device fabrication, many power-device manufacturers can upgrade silicon-based production lines to meet SiC device requirements. However, some SiC-specific processes require dedicated equipment development to realize SiC device capabilities for high voltage and high current.
SiC devices fall into two main categories with different end applications. Conductive SiC power devices, produced on low-resistivity conductive substrates, include Schottky diodes, MOSFETs, and IGBTs, and are used in electric vehicles, photovoltaics, rail transit, smart grids, data centers, and high-voltage charging. Semi-insulating SiC-based RF devices, produced by growing GaN epitaxy on high-resistivity semi-insulating SiC substrates to make HEMTs and other devices, are used in 5G communications, vehicular communications, defense, data transmission, and aerospace.
