Overview
One-Time Programmable / Multi-Time Programmable Memory (OTP & MTP)
What is NVM?
Non-volatile memory (NVM) retains stored data when power is removed. Traditional NVM examples include mask ROM, PROM, EPROM, EEPROM, and NAND/NOR flash memory. Emerging NVM technologies such as MRAM, RRAM, PRAM, and FeRAM are also part of the NVM category.
NVM Classes by Programmability
Based on the number of allowable programming cycles, NVM is commonly classified as:
- MTP: Multiple-Time Programmable, can be programmed multiple times.
- FTP: Few-Time Programmable, limited number of programming cycles.
- OTP: One-Time Programmable, programmable only once; once written, data is permanent.
This article focuses on OTP and MTP.
What Is OTP?
OTP (One-Time Programmable) is a type of non-volatile memory that can be programmed only once. Compared with MTP technologies such as EEPROM, OTP typically requires less silicon area and does not need additional processing steps, making it common in low-cost chips. OTP is often used to store reliably readable, rarely changing data such as boot code, encryption keys, and analog device configuration parameters.
OTP NVM refers specifically to non-volatile memory that allows only a single programming event.
Security Considerations in Embedded Systems
As embedded applications proliferate, product security has become increasingly important to protect hardware designs and to prevent unauthorized access. In many embedded systems, firmware and system data are stored in flash memory. Flash supports multiple erase/write cycles and retains data across power loss. To enhance protection, many flash vendors provide dedicated OTP registers inside the flash device.
OTP alone does not guarantee absolute security, but it enables developers to implement stronger protections. A number of software and hardware security mechanisms are built around OTP capabilities.
eFuse
1. What is an eFuse?
An eFuse is a one-time programmable storage element. It is typically written before chip packaging, and its capacity per chip is usually small. The term fuse refers to a microscopic fuse inside the integrated circuit. In semiconductor contexts, an eFuse operates as an on-chip electronic fuse.
2. Purpose of eFuses
eFuses can store memory repair data and chip-specific information such as allowable supply voltage ranges, chip revision, and production date. After die testing, manufacturers program such information into eFuses.
Introduced by IBM in 2004, eFuses use electromigration effects to achieve fuse blowing. The technique does not require new materials or special equipment and can be integrated into existing manufacturing flows. eFuses enable automated adjustment and monitoring of chip functionality to improve yield, performance, and power characteristics without manual intervention.
3. How eFuses Are Used
On initial power-up, a chip may read voltage-field values stored in eFuses and send them to an external power management unit. The power management unit supplies a nominal voltage (for example, 1.0 V) and adjusts the supply based on the eFuse values. After voltage adjustment, the chip performs a reset sequence.
4. Applications of eFuses
eFuses are used for a wide range of functions: analog trimming, calibration, repair, and field updates of system software. They are also used for security-related storage. However, because eFuse programming nodes can be observed with an electron microscope, the stored contents can be subject to physical attack and reverse engineering.
Anti-Fuse
Anti-fuse technology emerged to address security and density requirements. An anti-fuse cell typically consists of two transistors: a programming transistor and a read/select transistor. The cell can scale proportionally with process geometry, enabling higher density as macro sizes increase. Anti-fuse arrays can reach high densities, potentially into the hundreds of megabits.
eFuse vs Anti-Fuse
The main differences between anti-fuse and eFuse are programming mechanism, security, and power consumption:
- Programming mechanism: Anti-fuse programming applies high voltage across a thin gate oxide to induce avalanche breakdown, creating a permanent conductive path between gate and source. eFuse programming applies I/O voltages that produce high-density current through a metal or polysilicon line; electromigration then opens the narrow region of the conductor.
- Programmability and yield: eFuses are typically one-time programmable and program a bit to "1". If programming fails, the bit may not read as "1", which reduces yield. Anti-fuses can often be programmed multiple times (the original reference cites about 18 attempts), allowing retries to improve yield.
- Security: Anti-fuse is generally more resistant to physical inspection. eFuse programming states can be observed with an electron microscope, making data easier to extract. Anti-fuse programming states are difficult to distinguish under microscopy and are not readily detectable by focused ion beam (FIB) inspection, increasing resistance to unauthorized data recovery.
- Power and area: Anti-fuse cells are typically open in their unprogrammed state and store a logical "0", which can result in lower standby power and smaller area compared with eFuses, which are by default conductive and store "1".
What Is MTP?
MTP (Multiple-Time Programmable) memory can be reprogrammed multiple times as required by the user. EPROM, EEPROM, and NAND/NOR flash are examples of MTP technologies.
Industry practice often treats MTP, EEPROM/Flash, OTP, and mask ROM as distinct categories rooted in application needs. OTP and EEPROM/Flash represent two broad technology classes; MTP implementations are typically derived from one of these classes with design adjustments to meet specific multi-program requirements.
Because MTP uses different implementation methods from OTP, it supports multiple reprogramming cycles but generally involves more complex design and higher cost. MTP technologies are diverse, so their underlying principles vary across implementations.
Programming Mechanisms Compared
OTP program memory commonly uses fuse-based structures where programming is an irreversible destructive operation, typically changing a bit from 1 to 0. MTP implementations commonly use EEPROM or flash. Programming still changes bits from 1 to 0, but under specific conditions 0 can be restored to 1: for example, EPROM uses ultraviolet light to remove charge from the floating gate, while EEPROM uses electrical charge tunneling techniques.
PROM, EPROM, EEPROM, Flash, and Mask ROM
PROM (Programmable Read-Only Memory) is programmed after manufacture, unlike mask ROM. Each PROM bit is locked by a fuse or anti-fuse. Programming is typically done at wafer, test, or system level. In fuse-based PROMs, all bits start as "1" and programming blows selected fuses to produce "0" bits. Some PROM variants use Schottky diodes that are permanently damaged by applied stress to change state.
EPROM (Erasable Programmable Read-Only Memory) supports erasure and reprogramming, but erasure requires exposure to ultraviolet light for a specified time.
EEPROM (Electrically Erasable Programmable Read-Only Memory) can be erased and programmed using electrical signals, enabling in-system updates.
Flash memory is electrically erasable and programmable and is often treated as a form of EEPROM. Flash supports block-level erasure: sectors or blocks are the smallest erasable units, while writes are typically byte-level. Flash operates with a single supply voltage for read and write operations. Flash capacities generally exceed typical EEPROM sizes, and flash has become common for storing program code and firmware.
Flash types include NOR and NAND. NOR flash provides random read access with separate address and data lines, making it suitable for executing code in place but typically more expensive and lower in capacity. NAND flash resembles block storage, sharing address and data I/O, offering much higher capacity at lower cost, and is commonly used for data storage in USB flash drives and memory cards.
Mask ROM is created during wafer fabrication by encoding data into the mask pattern. Its contents are permanent and cannot be modified after manufacture.
OTP vs MTP Summary
Compared with MTP, OTP memory typically offers smaller area and avoids extra wafer processing steps, making it attractive for cost-sensitive applications. For small-capacity MTP needs, low-cost OTP structures can sometimes be used; for example, a design requiring a limited number of rewrites might implement several identical OTP blocks and use a fresh block for each write cycle to reduce overall cost.
Choice of memory type should be made based on application requirements and the characteristics of available memory technologies.
