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Custom PCB for PS5 NAND Recycling: Turning Dead Consoles into Reliable Portable SSDs

Daniel Li 15,812

Project Background

NAND flash prices have surged under intense pressure from AI training clusters and data-center expansion. High-density packages that once sat quietly inside consumer consoles now represent scarce capacity. When a PlayStation 5 fails, its internal storage chips—Toshiba/Kioxia FBiCS4 TLC devices—are often still fully functional. Maker and engineer Chase Fournier saw an opportunity: recover those packages, place them on a purpose-built USB carrier, and create a compact, usable portable SSD that sidesteps the current supply bottleneck.

surging NAND flash prices

The project is more than a clever salvage exercise. It tests whether recovered high-density NAND can be reliably re-hosted on a modern controller and bridge combination, then packaged into a form factor that engineers and makers can trust with real data. Success hinges on precise PCB decisions: BGA land patterns, surface finish, via strategy under fine-pitch packages, controlled-impedance USB routing, and stable power delivery to a DRAM-less SSD controller. Without those foundations, firmware matching and capacity reporting become secondary problems that never get solved.

In this context, the carrier board is not a disposable prototype. It is the critical platform that determines whether recovered silicon becomes a daily-use drive or remains an interesting lab experiment. AIVON PCB's rapid prototyping and manufacturing support provided exactly that platform, allowing the focus to stay on electrical and firmware challenges rather than board-level defects.

 

What This Video Covers

The video walks through the complete workflow of recovering dual BGA132 Toshiba/Kioxia TH58LJT0T24BA4M packages from a failed PS5 motherboard and integrating them into a compact USB 3.x portable drive. It covers careful desoldering and package cleaning, reballing with a precision stencil, placement onto a custom SM2259XT + AS2235 carrier, firmware selection and programming cycles, capacity detection, performance validation with CrystalDiskMark, and real-world file-transfer behavior under thermal load. Particular attention is given to the PCB parameters that enable repeatable BGA reflow, clean high-speed signaling, and stable operation inside a metal enclosure.

Toshiba/Kioxia

 

Project Highlights and Key Features

  • Recovered dual 512 Gb FBiCS4 TLC packages successfully reballed and mounted on a purpose-designed double-sided carrier.
  • Silicon Motion SM2259XT DRAM-less controller paired with ASMedia AS2235 USB bridge for full USB 3.x compatibility.
  • Detected capacity of approximately 229936 MB (~224 GB usable) after correct firmware and CE/CH mapping.
  • Sequential performance reaching ~461 MB/s read and ~71 MB/s write, with practical multi-gigabyte transfers limited primarily by enclosure thermal throttling.
  • Clean enumeration on PCs and multiple console USB ports, including the rear port of a working PS5.
  • Controlled-impedance USB differential pairs, ENIG surface finish, filled via-in-pad under BGA regions, continuous power/ground planes, and local low-ESR decoupling—all engineered for reliability through repeated heat cycles.
  • Higher-Tg FR-4 core and balanced copper distribution that maintained board flatness during reballing and assembly.

 

Challenges Encountered During Development

The largest technical hurdles centered on three areas. First, firmware compatibility: many SM2259XT packages refused to recognize the Toshiba FBiCS4 silicon, remaining locked in ROM mode or reporting only 1024 MB. Only a precise package–profile combination (SM2259XT2_TSB-FBiCS4_PKGW0602A_FWW0529A0 with the exact TH58LJT0T24BA4M parameters) produced a clean PASS and full capacity. Second, the AS2235 bridge required its own firmware flash and multiple plug/unplug cycles before reliable enumeration. Third, mechanical and thermal realities of fine-pitch BGA work: any solder-mask misalignment, unfilled vias that wicked paste, uneven surface finish, or board warp quickly produced opens or bridging. Sustained writes also revealed heat buildup inside the compact metal enclosure, making power integrity and plane continuity essential for stable controller behavior.

These issues are typical of high-density NAND recycling and small-form-factor USB SSD designs. Without disciplined DFM and a manufacturing partner capable of rapid, high-quality revisions, the project would have stalled at the firmware or first-pass yield stage.

 

How AIVON PCB Helps

AIVON PCB supplied a purpose-built custom carrier rather than a generic prototype board. The stack-up was engineered for 90 Ω controlled-impedance USB 3.x pairs, keeping the high-speed differential lines short, tightly coupled, and referenced to continuous ground planes. Surface finish was specified as ENIG, providing a flat, oxidation-resistant landing zone that allowed the reballed 132-ball packages to wet evenly on the first reflow. Via strategy under and around the BGA areas used filled via-in-pad and tightly tented microvias, eliminating solder wicking and preserving land integrity across multiple programming heat cycles.

Material selection further supported reliability: a higher-Tg FR-4 core resisted local warping during reballing, while continuous power and ground planes plus carefully placed low-ESR decoupling capacitors kept the DRAM-less SM2259XT stable under sustained write loads. Accurate soldermask registration and balanced copper distribution removed the small mechanical stresses that commonly cause opens on fine-pitch BGA assemblies.

When CE/CH mapping or resistor configurations needed adjustment for the Toshiba FBiCS4 profile, AIVON delivered quick-turn revisions of the identical stack-up and finish, keeping development momentum intact. The result was higher first-pass yield, cleaner joints, improved thermal behavior inside the enclosure, and a finished 224 GB drive that formats cleanly and survives daily use. In short, AIVON's rapid PCB prototyping, expert DFM guidance, and reliable manufacturing turned an ambitious recovery experiment into a trustworthy portable SSD.

 

Conclusion

Recovering high-density NAND from discarded consoles and giving it a second life as everyday storage is both technically feasible and increasingly relevant under current supply constraints. Success, however, rests on the quality of the carrier PCB: precise BGA geometry, correct surface finish, controlled impedance, robust power delivery, and the ability to iterate quickly when firmware or mapping issues appear.

AIVON PCB's combination of engineering support, fast-turn manufacturing, and attention to DFM details made that success possible. The finished drive is more than a demonstration—it is a practical, reliable product that proves recovered silicon can leave the lab and enter daily workflows.

If you are working on NAND recycling, custom USB SSD carriers, or any high-density BGA design that demands consistent reflow and high-speed signaling, start with a manufacturing partner who treats every prototype as a potential production board. Request a free DFM analysis or quote for your next carrier design at AIVON PCB and turn recovered components into working hardware you can trust.

 

PCB-Related FAQ

Q1: What surface finish is recommended for reballing BGA132 NAND packages onto a compact USB carrier PCB?

A1: ENIG is preferred. Its flat, oxidation-resistant surface ensures consistent wetting of reballed packages during reflow, reducing opens and bridging compared with uneven HASL finishes.

Q2: Why is via design under or near the NAND BGA critical on these carrier boards?

A2: Unfilled vias can wick solder away from the joints. Filled via-in-pad or tightly tented vias placed just outside the ball array keep solder in place and maintain joint reliability through multiple heat cycles.

Q3: What impedance control is required for a USB 3.x + SM2259XT carrier board?

A3: A controlled-impedance stack-up with 90 Ω differential pairs for the USB high-speed lines is essential. Short, tightly coupled pairs referenced to continuous ground planes prevent enumeration failures and speed loss.

Q4: How does board flatness affect yield when soldering large BGA NAND packages?

A4: Warp of only a few mils across the BGA footprint creates uneven pressure and incomplete joints. A rigid, higher-Tg board with balanced copper and proper baking significantly improves first-pass yield.

Q5: What power-delivery features are needed for a DRAM-less controller such as the SM2259XT?

A5: Place multiple low-ESR decoupling capacitors within 2–3 mm of the controller and NAND power pins, supported by continuous power and ground planes under the packages, to keep the controller stable during heavy writes.

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