Most impedance-controlled jobs stall in CAM because the stackup PDF, the impedance note, and the thickness callout each look complete on their own, but they often describe different constructions. CAM review is often the first point at which those documents have to resolve into one buildable construction.
This article is for layout engineers, hardware owners, and manufacturing engineers who have already released an impedance-controlled package and then received an engineering query (EQ) about material, width, copper, or finished thickness. It explains how PCB stackup, impedance, and thickness interact in fabrication, why those conflicts sit on the critical path, and what CAM is actually asking before production planning can schedule lamination.
It is an overview of that problem domain, not a walkthrough of any single EQ, and not a material catalog or impedance calculator. Cores and prepreg cannot be reserved until a specific construction is agreed, which puts these findings on the critical path rather than leaving them for first-article testing.
The same three types of findings keep appearing in real reviews: construction and lamination, impedance definition, and thickness/copper alignment. Within those clusters, the individual EQs usually fall into the categories below.
| EQ Category | Typical CAM Query | Main Trigger or Source of the Issue | Typical CAM Consideration / Resolution |
|---|---|---|---|
| Stackup vs factory stock | Can this lamination drawing be built from cores and prepreg we keep, or is a substitute required? | Stackup table or lamination drawing calls a core, prepreg combination, or sequence that is not stocked or not qualified at that site | Confirm one buildable construction and reopen Z and thickness if the dielectric changes |
| HDI / high-speed lamination | Can the CAD layer picture be laminated as drawn, or does the shop need a different cycle count or core/prepreg split? | Buried/blind or high-speed builds that do not follow the drawn sequence | Agree the actual lamination sequence before treating published Z and thickness as frozen |
| Impedance traces vs stackup | Which traces carry the target, on which layer, against which plane, at which width/space? | Table with no matching geometry, geometry with no layer callout, or widths calculated on a different dielectric | Identify the structure, then compensate width/space, retarget Z, or change the stackup |
| SE vs differential on one build | Can both targets exist on the same layer and dielectric? | Two electrical numbers that ask for two different geometries on one construction | Customer names which target takes priority, or the stackup / targets change |
| Thickness vs stackup | Will the selected stackup meet the finished-thickness window? | Thickness note and stackup table that only agree if copper or dielectric ignore the impedance table | Fit the selected build to the window, or name the requirement that yields |
| Base vs finished copper | Is the copper number start foil or post-plate copper, inner or outer? | Notes that treat base and finished copper as interchangeable | Lock which number the board will be judged on, then check etch and Z against that copper |
How PCB Stackup Ties Impedance, Thickness and Copper Weight Together
A stackup is the recipe: which core, which prepreg, which copper on which layer, and in which order. An "8-layer, 1.6 mm" callout tells the fabricator what you hope to hold in your hand, but it does not tell them what to pull from the rack.
Impedance is a calculated result, not a physical feature on the drawing. Dielectric height, Dk, trace width and space, the copper that remains after etch and plate, and the plane that trace sees all feed the same number. If any one of those inputs changes, the value on the impedance table is no longer the value you should expect to measure.
Finished thickness is an output of the same recipe. Press-out, copper, plating, and mask add up to a dimension, so writing that dimension on the drawing after the stackup is chosen does not create it.
"1 oz copper" stays ambiguous until someone says whether they mean the foil on the roll or the copper after plate, and whether they mean inner or outer. Start copper sets etch compensation. Finished outer copper is a plated result. Those two figures only stay aligned when both are written down.
The factory already has cores, prepregs, and qualified builds on the shelf. A customer PDF is either a request to use that inventory or a request to do something else. HDI and high-speed jobs add another variable: the CAD layer picture often diverges from the lamination sequence the shop can run, and dielectric height, reference planes, and total thickness move with that sequence.
Before release, the package needs a construction owner (customer table or factory equivalent), identifiable impedance structures, copper called as base and/or finished, a thickness window that can coexist with those Z targets, and a written priority if the four objects collide.
| Engineering object | What it actually is | What moves if it is left loose |
|---|---|---|
| Stackup | Named cores, prepreg, copper, and lamination sequence | Dielectric height, Dk path, Z, finished thickness |
| Impedance | Result of geometry + dielectric + copper + reference plane | Width/space, coupon plan, measured Z |
| Board thickness | Press-out + copper + plate + mask inside a stated window | Connector fit, impedance reference, warpage risk |
| Copper weight | Start foil and/or finished copper, inner and outer called separately | Etch compensation, finished Z, current-carrying copper |
CAM Review Conflicts in Stackup, Impedance and Board Thickness
The typical finding is less about a line in the wrong place than about three documents describing three boards. CAM is checking whether one combination of cores and prepreg can satisfy every number in the package. Until that answer is yes, production planning has nothing reliable to reserve.
Customer stackup versus factory stock and the lamination drawing
Someone still has to map the stackup table onto cores and prepreg that exist at that fabrication site. The EQ appears when the table calls a core thickness, a prepreg combination, or a sequence the factory does not keep — or has never qualified.
If no qualified material combination is available, the job cannot move to lamination until the construction is resolved. A substitute dielectric also reopens the impedance widths and the finished thickness already published. The stackup PDF usually passes as a document; the issue is the recipe behind it.
Customer stackup versus factory inventory mismatch is the same finding with a different cover sheet. One file names materials, the other is the site's stock and qualification list. A silent dielectric swap would leave the published Z table orphaned, so CAM stops and asks.
HDI and high-speed lamination adjustments that change the intended build
Buried/blind builds and high-speed materials often cannot follow the sequence drawn in CAD, so the shop offers a different cycle count or a different core/prepreg split that sequential lamination can actually run.
That change reaches the dielectric, not just the header block. Heights move, reference planes can move, and total thickness moves. Impedance and thickness signed off against the old picture then belong to a board the press will not make. When the intended build and the runnable sequence diverge, every number that assumed the CAD picture needs a second look.
Impedance traces that cannot be identified or do not match the stackup
CAM still has to identify the traces that carry the target, on the correct layer, against the correct plane. What usually arrives instead is a table with no matching geometry, geometry with no layer callout, or widths calculated on a different dielectric than the one in the stackup PDF.
If the structure cannot be located, there is no coupon and no compensation path, so the impedance note stays on the page and drops out of the process. Width/space adjustment starts only after the traces exist in the data and after the dielectric under those traces is the dielectric in the agreed stackup.
When impedance traces are "not found in the data," the requirement usually never made it into the artwork.
Single-ended and differential targets that cannot share the same construction
Same layer, same dielectric, two targets: one asks for a width, the other asks for a width and a gap. Those two geometries frequently will not coexist on that dielectric.
The conflict is electrical rather than editorial. Pairing and net names are secondary, because two numbers are asking for two stackups. The factory generally leaves that choice with the customer, which is why the EQ appears. Renaming nets does not create a second dielectric height.
Finished board thickness versus the stackup and its tolerance
A finished thickness and a tolerance can sit on the drawing beside a stackup that only lands there if copper and dielectric both ignore the impedance table. Tolerance is a window around a real build, not slack for an unbuildable one, and CAM will not average an impossible construction into the band.
Mechanical fit and impedance both assume the same finished thickness. If the selected impedance construction pushes finished thickness outside the required window, a connector, heatsink, card guide, or the impedance model may expose the conflict. The finding is the disagreement between the thickness note and the stackup note on the build about to be booked.
Base copper versus finished copper, and plated result versus the note
Inner foil comes off a roll. Outer finished copper comes off the plater. The two numbers look related on a note and behave as different inputs in process.
If the note calls for finished 1 oz on the outer layers and start foil plus plate will not land there, etch compensation — and therefore the impedance width — is already on the wrong path. CAM needs the number you will reject the board on.
Finished copper versus the plated result belongs to the same family after process. The note stated a finished value; the plater produces what start copper plus plate will actually give. Leaving both in force is how two lots get built to two interpretations.
What Breaks in Lamination and Plating When the Notes Disagree
Production planning can reserve materials and schedule the lamination cycle only after the construction is agreed. Mixed notes therefore park the job before any panel is laid up.
Once a construction is chosen, plating and etch follow that copper. Impedance width compensation assumes a known start copper and a known finished copper, so a note that meant the other number produces a trace the model never saw.
The expensive version looks fine on the first lot, built to one reading of the notes, then drifts on the second lot, built to the other. Thickness and Z both move while the Gerbers stay untouched. CAM is trying to catch that before lamination, not after assembly.
| If this stays unresolved | What the shop cannot do | What the product can inherit |
|---|---|---|
| Construction vs stock | Reserve cores and prepreg, or schedule a lamination cycle | A substitute dielectric under frozen widths |
| Lamination sequence vs CAD picture | Laminate the sequence the drawing assumed | Moved reference planes and a new total thickness |
| Impedance traces vs data | Coupon and compensate the controlled nets | A Z note that never reached the artwork |
| SE vs DIFF on one dielectric | Pick a single geometry set | One target made, the other missed |
| Thickness vs selected stackup | Commit to a finished-thickness window | Mechanical misfit or a Z model that assumed the old dielectric height |
| Base vs finished copper | Set etch and plate to a reject criterion | Wrong finished width, wrong finished copper, or both |
Confirming Stackup, Impedance and Copper Weight Before Build
The finding closes when the job file contains one story. Choose the construction that will actually be laminated — customer table, factory stock equivalent, or the revised HDI/high-speed sequence — and put that picture back in the package. Chat history does not travel with the panel.
Then pick one path for impedance: move width/space on the agreed dielectric, change the target, or change the stackup. Name copper as start or finished, inner or outer. Set the selected build beside the thickness window, and if the two miss, name the requirement that yields.
The usual exits are the factory equivalent stackup, a retargeted Z, width/space compensation, a looser thickness or copper note, or an artwork spin. There is rarely an unused exit that keeps every original number.
Pre-Submit Gates for Stackup, Impedance, Thickness and Copper
- Stackup / lamination table is in the package and the layer count matches the data.
- Construction is fully specified, or the note says the factory may propose an equivalent.
- Impedance table lists SE or DIFF, target, layer, reference plane, and the traces or nets.
- Those traces exist in the Gerber/ODB++ on the layers you named.
- Finished board thickness and tolerance appear once and match the stackup notes.
- Inner and outer copper are called as base and/or finished.
- HDI / sequential / high-speed jobs either show buried-blind and lamination intent, or they delegate it.
- If Z, thickness, copper, and stock material can fight, a written priority is in the notes.
FAQ — Stackup, Impedance and Thickness in CAM Review
Q1: Why does CAM ask about the stackup when the PDF is already in the package?
A1: The PDF is a request. CAM still has to match it to cores and prepreg the factory keeps, then check that the same construction still supports the impedance table and the thickness window.
Q2: Can the factory just substitute stock material and keep my widths?
A2: Only if an equivalent was allowed in writing and Z and thickness are then reconfirmed on that dielectric. A substitute core or prepreg changes height and often Dk.
Q3: Why can't they find the impedance traces in my data?
A3: The table named a target without naming the layer, the reference plane, or the geometry, or the geometry lives on a different layer than the table. CAM coupons artwork rather than cover-sheet language.
Q4: What happens when single-ended and differential targets share one layer?
A4: They share one dielectric height. If both geometries will not coexist on that dielectric, a target, a layer assignment, or the stackup has to move.
Q5: I already put finished thickness on the drawing. Why is that still an EQ?
A5: Finished thickness is an output of the lamination build, copper, plate, and mask. When the stackup that supports impedance sits outside the window, the drawing note and the recipe disagree.
Q6: Do you need base copper or finished copper?
A6: Name both, unless only one matters to the product and movement in the other is acceptable. Impedance etch compensation depends on which number is real.
Q7: Will an HDI or high-speed lamination sequence change my impedance?
A7: It can. A different cycle count or core/prepreg split changes dielectric heights and can move which plane a trace sees.
Q8: Who decides which requirement wins if Z, thickness, copper, and stock collide?
A8: That decision stays with the customer. CAM generally cannot determine which requirement should take priority when mechanical, electrical, copper, and material constraints conflict.
