When a job reaches CAM, the circuit is often already sound. What holds release is the panel: how boards are arrayed, whether a process edge exists, how the array comes apart, where tooling and marks sit, and how close copper and pads run to the finished outline.
This page is for layout engineers, hardware owners, and CAM reviewers who need a working picture of PCB panelization and outline. It stays at overview level. Later pages can take single EQ types apart. Nothing here is a factory capability table — no rail widths, V-cut residual thicknesses, or stamp-hole diameters presented as rules.
The same clusters keep showing up in review: panel method and process edge left open; stamp holes and V-cut fighting each other or fighting copper; tooling, optical, and MARK features missing or sitting on a score line; copper and pads crowding the contour.
| EQ Category | Typical CAM Query | Main Trigger or Source of the Issue | Typical CAM Consideration / Resolution |
|---|---|---|---|
| Panel method, process edge, rail copper, scrap | Confirm array vs. single-board ship, rail size, whether rails stay with the shipment, and copper on rails vs. waste | Panel construction missing, split across files, or left as "factory to advise" with no limits written down | Freeze panel method, rail intent, copper-on-rail, and scrap treatment in the panel drawing and fab notes |
| Process-edge geometry | Confirm corner treatment on the process edge | Rail drawn as a sharp rectangle | Confirm chamfer or radius, or accept the corners as drawn; put the choice on the panel outline |
| Stamp holes (mouse bites) | Confirm hole size, pitch, bridge alignment, and whether tabs will survive process | Geometry incomplete, holes off the intended bridges, or tabs look undersized | Confirm or revise the stamp-hole map so connections land on the intended break-off tabs |
| V-cut location and keep-out | Confirm score line, residual thickness, angle, and copper keep-out can exist together | V-cut notes compete with nearby copper, pads, or marks | Agree one V-cut map; move copper or the score if they cannot share the same strip |
| Mixed V-cut and stamp holes | Confirm both methods on one array are intentional | Both features drawn with no note about panel strength | Keep the mix on purpose, or drop back to one depanel method |
| Tooling / optical / MARK on the rail | Confirm add or move of tooling holes, optical points, and MARK features; singles with no tooling | Rails missing or too small; marks on a V-cut line; singles have nothing to register to | Add or shift features onto a process edge; keep marks off the score |
| Outline-to-copper / pads | Confirm copper and pads vs. routed or scored contour | Pour or pads crowd the finished outline | Accept the exception, pull copper or pads back, or change the outline / score path |
What Panelization, Process Edge, and Outline Actually Mean
PCB panelization and outline covers more than how many images fit on a working panel. It covers the finished contour, the production array if there is one, break-off rails, scrap, depanel method, registration features that live off the board, and copper at a routed or scored edge.
Finished outline versus production panel
The finished outline is the shape after depanel. The production panel is what actually goes through drill, plate, image, and route. Product can ship as true singles, as a customer array that stays together into assembly, or as a factory panel that is broken down before shipment.
A Gerber that shows one board and no array notes does not pick among those three. CAM still has to know whether to add a process edge, nest multiple images, or build the outline exactly as drawn. Until that is written down, plating, routing, and depanel stay provisional.
Process edge
A process edge — break-off rail, technical border — is extra material around the array or the single image. Shops use it for handling, plating current, registration, and sometimes copper balance. Size, corner style, whether the rail is poured, and whether that copper counts as product or scrap all change processing and packing.
A rail is a common place for tooling holes and fiducials so those features do not sit on the finished board. That is not a blank check to invent a rail the designer never budgeted, or to leave the rail bare when the process needs copper there for resin-flow balance. Both show up as confirmation questions: panel method, process-edge size, rail copper and scrap, and copper on the rail for flow balance.
Depanel methods
How the array comes apart is a structural choice.
- V-cut scores a straight groove and leaves residual thickness to break later.
- Stamp holes PCB (mouse bites) perforate a tab so the board snaps at defined bridges.
- Routed tabs leave solid connections that are punched or broken after routing.
- Mixed methods put two of those on one array.
Each method takes material out in a different place and leaves a different edge. Combining them changes how stiff the panel is while it is still in process. Running any of them through copper, pads, or optical marks changes the edge you actually get.
Outline-related copper
Two copper questions sit next to each other and get mixed up.
On rails and in waste, pour may be there to balance resin flow and plating, or it may be banned because the rail will be thrown away against a finish-sensitive note. That is panel construction.
On the finished board, the question is distance from pour, plane edges, and pads to the contour. Features on or against the routed or scored path turn into edge copper exposure, scored copper, burrs, rolled copper, or incomplete pads. Copper drawn flush to the outline is a machining problem waiting for the router or the V-cut blade.
Features on the process edge
Tooling holes, optical points, and MARK / fiducials usually belong on the rail. They stay off the product and they still exist after depanel. CAM will ask whether those features should be added on the process edge. On single-board ship with no tooling holes in the image, the usual request is to add them on a factory rail. None of that works if the mark sits on a V-cut line.
What has to agree in the data
CAM will treat the array as defined when these line up:
- Gerber outline, plus a separate panel outline if you have one
- Panel drawing with rails, rotation, and scrap
- V-cut and stamp-hole callouts that match the intended bridges
- Fab notes for ship form (array vs. single), who owns the rail, and copper on the rail
- Tooling / optical / MARK locations that still exist after scoring or tab breakout
If that set is incomplete, CAM is not guessing a panel on your behalf.
Key Panel Decisions Before CAM
Most of the pain is avoidable in the design package. The items below are choices to make before files leave engineering — not a CAM script and not a submit checklist.
Who owns the panel
Someone has to own the array: the customer, the factory (fabrication panel only), or neither, because the board ships as a true single. That ownership carries rail size, rotation, and scrap.
If you own the array, the panel drawing should already show rails and break-off features. If the factory panels, you still need limits in the package: ship as single or as array, whether a rail may land on a cosmetic or impedance-sensitive edge, and whether rail copper is allowed.
"Factory to advise" with no limits does not delete the decision. It just moves it into an EQ.
What the process edge is for
A rail can be handling only, copper-balance / resin-flow control, a tooling carrier, or all three. Corners and rail copper belong to that intent. A sharp right-angle rail that will be bagged is a packing detail. Copper poured on the rail for flow balance is a process detail, not leftover pour.
A rail that only carries tooling can be narrow and mostly empty of copper, as long as the holes and marks still clear the score and route paths. A rail that is also a copper-balance feature is a different part. Empty and fully poured are not interchangeable.
Depanel as one system
Pick V-cut only, stamp holes only, routed tabs, or a mix, then place score lines and tabs against copper, pads, and components.
V-cut wants a straight path and copper kept off that path. Stamp holes want bridges that line up and enough remaining material that the panel does not snap in drill, plate, or route. Using both on one array is fine only if the remaining web is expected to survive process. That call belongs in the package, not in a thread after CAM notices both features on the same panel.
Outline clearance
Pads, pour, and plane edges versus the finished contour are one rule family. "Looks close in CAD" becomes exposure, a score through copper, burrs, rolled copper, or a pad that is no longer complete once the router or the V-cut runs. The keep-out that counts is keep-out from the machined path, not from an idealized line on the screen.
Registration features
Decide which tooling holes and optical / MARK points live on the rail and which live on the board. Single-board ship with no holes in the image usually means the factory will propose an add-on rail. Assembly marks that must stay on the finished board cannot be the only fabrication fiducials sitting on a rail that will be broken off.
Keep optical points off V-cut lines while you are still in CAD. A mark scored through is gone after V-cut.
What stays in the package
The package should already state:
- Ship form and who owns the panel
- Process-edge intent: size approach, corners, copper, scrap
- Depanel method map
- Copper-to-outline intent on the finished board
- Tooling / optical / MARK plan, including single-board-ship behavior
Factory nesting can stay factory-owned if it does not violate those limits. The limits still need to be written: no rail on a named edge, no rail copper, no V-cut through a mark, single-board ship. Confirmation of those items later is handoff, not a new design review.
Common Panelization and Outline CAM Issues
Jobs stall here because the panel is undefined or internally inconsistent, not because one hole diameter is slightly off. Stamp-hole and V-cut findings are strength and breakout findings first. Tooling and fiducial questions appear when rails are missing, too small, or scored through the marks. Copper-to-outline questions are about exposure, scoring, and burrs. Mixing V-cut with stamp holes, or parking marks on a V-cut line, stacks those problems.
| Problem group | What CAM is looking at | Why it matters in production |
|---|---|---|
| Undefined panel / rail / scrap | Array pitch, rail width, ship-with-rail, copper on rails vs. waste | Plating, routing, and depanel cannot be planned; two lots can be paneled differently |
| Sharp process-edge corners | Rectangular rails with untreated corners | Bags puncture; handling damage at pack-out |
| Stamp-hole geometry and alignment | Size, pitch, bridge location, remaining tab | Panel breaks in process, or depanel tears copper and laminate |
| V-cut vs. copper / pads | Score location vs. residual thickness, angle, and keep-out | Callouts cannot all be true; pads get cut, not just thinned |
| Mixed V-cut and mouse bites | Both methods on one array | More material gone; panel goes soft before final depanel |
| Tooling / optical / MARK | Presence, rail space, location vs. V-cut | Singles have no registration path; marks die at scoring |
| Copper and pads vs. outline | Distance from pour and pads to routed or scored contour | Edge copper exposure, burrs, rolled copper, incomplete pads |
Undefined panel method, process-edge size, rail copper, and scrap
CAM cannot assume pitch, rail width, whether rails ship with the boards, or how waste is poured. Until panel method, process-edge size, rail copper, and scrap are confirmed, plating current, routing order, and depanel stay open.
Rail copper is the same family. Pouring the process edge for resin-flow balance, or leaving it bare, is a design choice with process consequences. The shop may add a rail you never budgeted, or skip copper the process wanted for flow. Either way the panel in the machine is not the panel the files appeared to describe.
Process-edge geometry that damages handling or packaging
Right-angle rails punch through bags and are unpleasant to handle after depanel. That geometry lives on the panel outline, so it is easy to omit from a circuit-focused package. CAM asks about corner treatment because a sharp process edge is a packing problem. The netlist can be clean and the bag still fails.
Stamp-hole size, pitch, alignment, and tab strength
Stamp holes go wrong in two directions. Weak tabs let boards break while the panel is still in process. Holes that miss the intended bridges make breakout ugly or unpredictable. Size, pitch, connection strength, and break risk are a rigidity problem.
Alignment is visible in the data on its own. Stamp holes that do not sit on the planned bridges will not break where the drawing implies. Undersized connections are the weak-tab version of the same issue. Both show up in drill, plate, and route, and again when someone tries to snap the array without tearing copper or laminate.
V-cut location, residual thickness, angle, and copper keep-out conflicts
A V-cut is a groove with remaining thickness and an angle. Those three fight with nearby copper and pads. The finding appears when the score line, the keep-out, and the residual-thickness note cannot all be true on the same strip.
A score that runs into copper is not "a bit less copper." If it clips a pad, the pad in the finished board is not the pad in the Gerber.
Mixing V-cut and stamp holes on the same panel
Both methods on one array take out more material than either method alone. Panel strength drops. CAM flags the combination when it is drawn and nobody has said the remaining web is acceptable. The breakage risk is in drill, plate, and route, not only at final snap.
Tooling holes, optical points, and MARK features on the process edge
Rails exist in part so tooling and fiducials can live off the finished board. CAM checks that the carrier actually carries those features.
Single-board ship with no tooling holes in the image is a regular request to add holes on a factory rail. Optical or MARK points on a V-cut line do not survive scoring. The Gerber still shows the mark. The scored panel does not.
Pads and copper too close to the outline
Pour or pads against the contour come off the router or the V-cut as exposed copper, scored copper, burrs, rolled copper, or a pad that is no longer whole. Edge copper exposure is a process defect and a field surface: corrosion, creepage, handling on bare copper. Outline machining that cuts a pad leaves an incomplete pad.
This is the outline half of the topic. It does not care how elegant the array is. Generous rails will not save a pad that sits on the finished contour.
Manufacturing Impact
Scoring into copper and routing that leaves burrs or rolled copper are outline-machining problems. Rails that cannot support plating or registration are panel-construction problems. A V-cut keep-out that exists only as text, with copper still under the groove, still puts the blade through metal. A process edge with no stated copper role leaves plating and lamination without a balance condition.
Undersized stamp-hole tabs and mixed V-cut plus mouse-bite lines crack panels before anyone means to depanel. That scrap happens in drill, plate, or route. A web that is "good enough to snap at the end" can be too weak while the panel is still a process carrier.
Edge copper exposure, incomplete pads after the outline is cut, and pads damaged by V-cut travel into inspection and into the field. Bare copper at the board edge is a corrosion and creepage surface. A pad that no longer matches CAD is an assembly change even if the net still connects.
Sharp process-edge corners open bags. Missing tooling leaves single-board ship with nothing stable to register to. Neither issue is in the schematic. Both stop pack-out or setup.
Unconfirmed panel method, rail copper, and scrap also mean two lots can be paneled differently from the same circuit data. One lot gets a poured rail for flow balance. The next gets an empty rail because a different engineer read the same silent drawing.
The schedule cost is the multi-party EQ — design, CAM, process — while Gerber release waits on who owns the rail, whether mixed depanel was intentional, and whether copper may sit on the contour.
| Impact channel | Typical source in the data | What is at risk |
|---|---|---|
| Fabrication quality | V-cut through copper; copper on the routed path; rail with no stated copper role | Scored pads, burrs, rolled copper, no stable plating or registration plan |
| Panel survival | Undersized tabs; V-cut plus stamp holes; tabs off the bridges | Breakage before intended depanel |
| Finished-board reliability | Edge copper exposure; incomplete pads after outline cut | Corrosion, creepage, assembly on a damaged pad |
| Handling and pack-out | Sharp rail corners; no tooling on single-board ship | Punctured bags; no consistent registration feature |
| Lot-to-lot consistency | Unconfirmed panel method, rail copper, scrap | Different arrays from the same circuit files |
| Release schedule | Answers left in email instead of the drawing | Gerber held until design, CAM, and process agree |
How an EQ Becomes a Manufacturing Decision
By this point the design choices should already exist. What is left is freezing the answer so the same question does not come back on the next respin.
CAM typically asks the customer to confirm:
- Panel method and rail size: customer array, factory panel, or single-board ship; whether a process edge is added; what the rail is for if size is factory-owned
- Rail copper and scrap: pour on rails vs. waste, and whether that copper is only for process balance
- Depanel map: V-cut, stamp holes, or both, with lines and tabs on the intended bridges
- Tooling / optical / MARK: add, keep, or move — especially when singles have no tooling holes
- Copper-to-outline exceptions: accept the crowding, pull features back, or change the contour / score
- Conflicts already in the files: V-cut location vs. residual thickness, angle, and keep-out; stamp holes off the bridges; optical points on a V-cut line
The usual ways out are few. The customer confirms the drawing as drawn and accepts the process risk. The customer lets the factory add a process edge and tooling inside recorded limits. The customer revises outline or copper so keep-out and contour agree. Mixed depanel drops back to one method. Features move: stamp holes onto the bridges, optical points off the score, tooling onto a rail that will still be there after V-cut.
That is the shape of the resolution, not a repair procedure for any one EQ.
The answer has to land in the panel drawing (array, rails, scrap, corners), the outline layer, the V-cut and stamp-hole callouts, and fab-note language for ship form, rail copper, and permission to add tooling on a process edge. A confirmation email will not be there when the next reviewer opens the respin.
"Factory to decide" still needs limits. Single-board ship, no rail copper on a finish-sensitive edge, and no V-cut through a mark are constraints. CAM can nest inside a written limit. It cannot nest inside a limit that was never written.
Before CAM: The Six Checks That Should Already Be True
Scan before submit. If a line is false, the package is not ready.
- Panel method is stated: customer array, factory panel, or single-board ship.
- Process-edge size, corners, rail copper, and scrap / waste copper are stated, or left to the factory with recorded limits.
- Depanel map is complete: V-cut lines, stamp-hole locations, or both, with tabs and scores on the intended bridges.
- V-cut vs. copper / pad keep-out and vs. optical / MARK locations has been checked.
- Tooling holes and optical / MARK points are on the rail, or an add-on rail is requested, when the board ships without them.
- Pads and copper pour have been checked against the finished outline for exposure, scoring, burr, and incomplete-pad risk.
FAQ
Q1: What is included in PCB panelization and outline besides nesting boards on a panel?
A1: Finished contour, ship form (array vs. single), process edge, scrap, depanel method, rail copper, and the tooling / optical / MARK features that live off the board. Nesting is only placement.
Q2: When will CAM ask for a process edge on a board that ships as a single?
A2: When the image has no tooling holes or other fabrication registration features. The usual request is to add them on a factory rail. The rail is a carrier. The finished outline stays the finished outline if that is written down.
Q3: What has to be defined for stamp holes PCB before release?
A3: Where the holes sit relative to the intended bridges, and whether enough material remains for the panel to survive process. Size, pitch, and alignment are part of that. CAM will ask when holes miss the bridges or tabs look too small to carry the array.
Q4: Why does V-cut clearance conflict with residual thickness and angle?
A4: The groove, the remaining thickness, and the angle share one strip of laminate with the copper keep-out. If all of those are specified and cannot be true together, CAM raises the conflict rather than choosing for you.
Q5: Can V-cut and stamp holes be used on the same panel?
A5: Yes, they can be drawn together. Expect CAM to ask whether the mix is intentional. Both features remove material, and the panel is weaker in process, not only at final breakout.
Q6: Why do optical points conflict with V-cut?
A6: A mark on the score line is cut when the groove is cut. After V-cut it is not an optical or MARK feature, even though it is still in the Gerber.
Q7: What is edge copper exposure, and why does CAM raise it?
A7: Copper that becomes bare at the routed or scored contour — pour, plane edge, or pad. The same geometry also produces burrs, rolled copper, or an incomplete pad. A bare copper edge is a reliability surface.
Q8: Who should own rail size, scrap copper, and panel method?
A8: Whoever defines the array owns those details in the drawing. If the factory panels, the customer still owns ship form, whether a rail may be added, whether rail copper is allowed, and which edges are sensitive. Anything unowned comes back as an EQ.
Review the outline layer, panel drawing, and fab notes against the checklist before the job hits CAM. If a limit only exists in conversation, it is not in the manufacturing package yet.
