The pair looks paired on the screen. Two traces, same width, a length-tune accordion near the connector. Then the PHY link-trains on a short cable and drops on a long one, or the chamber finds common-mode that the schematic never drew. The members were never a pair for most of the run. They were two single-ended lines that shared a net class.
FR4 PCB differential pair routing is gap, reference, and delay — in that order. Length matching on the wrong spacing just delivers a clean mismatch to the receiver.
A Pair Is Coupling Plus a Shared Return, Not Two Nets in a Class
Odd-mode current goes out one member and back the other. Even-mode current goes out both and comes home on the plane. You need both behaviors. Tight intra-pair gap keeps the odd mode local. A solid adjacent reference keeps the even mode from becoming an antenna. Lose either one and "differential" is a label.
Coupling is gap versus height to the plane. On four-layer FR4 with 0.10–0.18 mm prepreg L1 to L2, a gap near the trace width actually couples. On 1.6 mm two-layer with ground on the far side, that same 0.15 mm gap is decoration. The field already went through the core. Two 100 Ω-ish traces sitting next to each other is not 90 Ω.
Zdiff is not 2 × Z0. Tight coupling pulls odd-mode impedance down. Calculators know that. The constraint manager does not, if you only typed a width and left the gap at default clearance.
Intra-Pair Gap Is the Impedance. Keep It Constant.
Lock the stack, then pick width and gap together for the class: 90 Ω USB, 100 Ω HDMI / Ethernet / LVDS / MIPI, 85–100 Ω PCIe per the note on that drawing. Typical outer FR4 on 0.10–0.15 mm prepreg lands around 0.10–0.18 mm width and a gap in the same band. Inner stripline wants a different pair. Do not copy L1 numbers onto L3.
Factory min space on 1 oz finish is often 0.10 mm, sometimes 0.075 mm as a premium. A 0.08 mm intra-pair gap on 1 oz is etch-limited. Coupons wander. Mask dams vanish. If the calculator needs that gap, drop to 0.5 oz or bury the pair before you argue with CAM.
The gap that sets Zdiff has to survive the route. Neck under a BGA if the pin field forces it, then restore within a few millimeters. A 2 mm uncoupled stretch at every via field is several discontinuities, not one escape. Do not open the pair to clear a via and leave it open. Put the via outside the pair. A ground via in a 0.12 mm gap usually does not fit.
Spacing to other nets is not the intra-pair gap. Three times the width, or at least two to three times the pair gap, keeps a USB pair from becoming a third member of the HDMI next to it. Parallel for 20 mm at 0.15 mm isolation is a coupler. Cross at 90° if you have to live close.
Match Intra-Pair Delay, Not Copper Art
Skew inside the pair is the first budget. Interface notes vary, but the numbers that survive review on FR4 are tight: USB 3.x and HDMI intra-pair often in the 0.12–0.25 mm copper band; PCIe similar; MIPI and DDR byte lanes tighter still. USB 2.0 is sloppier. Do not apply a 5 mil HDMI rule to a 12 Mbps pair, and do not apply a USB 2.0 rule to a 5 Gb/s lane.
Length is a proxy for time. Outer microstrip on FR4 is roughly 140–160 ps/inch. Buried stripline is slower. Matching L1 copper to L3 copper to the same millimeter is a phase error. Change layers only with both members, then match on that layer — or use a delay constraint the tool actually understands.
Serpentine next to the mismatch, not in a block at the connector after both members already walked different paths. Keep the accordion coupled. Wide U-turns with 0.5 mm gap inside the tune are single-ended loops. Trombone or sawtooth at the designed pair pitch.
Package pin length belongs in the budget if the vendor published it. Pad-center to pad-center while ignoring a 2 mm bond-wire difference is how a "matched" pair arrives skewed. Do not add the connector pin twice — once in the spreadsheet and once as extra copper.
Inter-pair matching is a different table. Clock-to-data, lane-to-lane, byte to strobe. That number is larger. Mixing the two constraints is how a DQ net gets a 0.15 mm accordion it did not need while the true pair still has 0.8 mm of uncoupled skew around a via.
Zdiff Follows the Stack. The Route Cannot Invent It.
A differential pair FR4 PCB class is width, gap, dielectric height, copper weight, mask on or off. Change gap along the route and you wrote several impedances. Change reference from L2 ground to a split power pour and you wrote a common-mode antenna with a 90 Ω label.
Soldermask on outer pairs drops Zdiff a few ohms. Calculators that assumed bare copper read high. 1 oz trapezoid versus 0.5 oz does not share a gap. CAM compensation needs room — if both width and space are already at process minimum, there is nothing to etch toward the coupon window.
±10% on the coupon is the normal FR4 ask for USB / HDMI / GbE. The coupon does not see a plane split under the real pair, a weave channel under a 0.10 mm line, or a 4 mm uncoupled jog. Those stay on the layout.
Routing Errors That Still Pass DFM
CAM will not flag an uncoupled pair. The board builds. The interface does not.
One member walks around a can; the other goes straight. Length gets tuned later. Coupling is already gone. Both members cross an AGND/DGND moat — even-mode loop is the slot. Only one member crosses — two SE traces for that inch. Mode conversion. A link that cares which way you hold the shell.
Layer hop with no ground vias flanking the pair. Antipads that merge into a slot on L2. Different via stub lengths on P and N. Serpentine against the board edge with no plane under the last 8 mm.
Calling the class 50 Ω single-ended and routing it as a pair, or the reverse. Tight length match on a 1.6 mm two-layer stack that cannot make the Zdiff. Pour copper stealing the designed gap. A common-mode choke breaking the pair with 1 mm of uncoupled entry on each pad — place the part on the designed pitch or stop calling those 4 mm of pad still 90 Ω.
Freeze Geometry, Then Tune Length
Pick the interfaces that are actually pairs. Put a stack under them that can hit the Zdiff at a fab-legal width and gap. Route both members together, same layer, same reference, same gap, around obstacles as a unit. Stitch the return at every layer change. Isolate the pair from neighbors by more than the intra-pair gap.
Neck only where the pin field forces it, then restore. Length-tune on the coupled pitch, on the layer the pair lives on, next to the skew you are correcting. Read package pin tables before you trust pad-to-pad.
That is b: a constant gap on a real stack, a continuous plane, and a delay match that does not undo the coupling. Spacing first. Matching second. Everything else is two traces with a constraint name.
