IPC-4761 is the design guide that names the structures used to protect vias. It does not set acceptance limits; those live in the performance specification called out on the drawing, usually IPC-6012. The document lists seven types so that a fabrication note does not have to invent its own vocabulary for "tent," "plug," or "fill." Designers still have to state which side, which material, and whether the finished surface must be planar and solderable. A generic "plug all vias" note leaves the fabricator free to choose a process that may not match the assembly requirement.
Most disagreements start when the type number is called out without the side or the intended surface condition.
Why Vias Need Protection in the First Place
An open via can wick solder during wave or selective soldering, steal paste from a nearby pad, or trap flux and chemistry that later corrodes the barrel. On fine-pitch or via-in-pad designs the open hole also creates a non-planar surface that affects stencil release and solder-joint volume. Protection closes the opening, blocks contamination, or restores a flat solderable land. The choice depends on how close the via sits to a component pad, whether the via must remain accessible for probing, and whether the finished surface has to accept solder paste. Leaving the via open is still valid when the via is far from pads and the finish coats the barrel wall.
Tenting with Solder Mask Alone
Type I is a tented via: dry-film or liquid solder mask bridges the opening while the barrel stays empty. Type II adds a second covering layer over the tent. Both are low-cost and adequate for vias that only need to stay clear of solder and debris. The mask membrane can crack or lift during thermal cycling or reflow, especially on larger holes or when the mask is thin. One-sided tenting on a bare-copper barrel risks trapping chemistry. Designers use tenting for ordinary signal vias well clear of SMT pads. When the via sits next to a fine-pitch pad the thin mask dam is unreliable; a plug or fill is safer.

Partial Plugging versus Full Filling
Type III is a plugged via: non-conductive material is forced part-way into the hole from one or both sides. Type IV adds a covering layer over the plug. The partial fill blocks most solder and flux but leaves an air pocket and often a dimple or bump at the surface. Type V is a filled via: material occupies the full length of the barrel. Type VI covers that fill with solder mask. Full fill eliminates the void that can expand during reflow and push material out of the hole. The fill material—usually a low-shrinkage epoxy—must be compatible with the subsequent surface finish and must not outgas. Conductive fill is available when thermal or electrical continuity through the via is required; non-conductive fill is the default for most signal and power vias.
Plugging is cheaper and faster than full fill. It is usually sufficient when the only goal is to stop solder migration. Full fill is chosen when the via must support a later planarization step or when residual voids are unacceptable.
Capping Restores a Solderable Surface
Type VII is a filled-and-capped via: the barrel is filled, the surface is planarized, and copper is plated over the fill on both sides so the finished land is flat and metallized. This is the structure required for via-in-pad. Without the copper cap the fill material is not solderable and any residual dimple or bump changes paste volume. The process adds steps—fill, cure, planarize, plate—so cost and cycle time rise. Cap plating thickness and flatness are controlled by the performance specification, not by IPC-4761 itself. On buried vias inside an HDI stack the copper cap is often unnecessary; Type V fill alone is sufficient and avoids the extra plating that thickens the copper and tightens etch clearances.

Matching the Type Number to the Actual Structure
IPC-4761 defines the seven types so that "Type VI" means filled and covered with mask, while "Type VII" means filled and capped with copper. Calling a masked fill "capped" creates confusion at the fabricator. Variants a and b indicate one-sided or two-sided treatment; the drawing must state which side if the requirement is not symmetrical. The standard is a 2006 design guide and is no longer actively maintained; acceptance criteria for voids, dimple depth, and cap plating come from the revision of IPC-6012 (or the applicable sectional performance document) listed on the order. Specifying the type number without the side, the fill material class, or the surface-finish requirement leaves the process open to interpretation.
Via-in-Pad Forces the Full Fill-and-Cap Sequence
When a via sits inside an SMT or BGA pad the surface must be flat enough for consistent paste printing and must present a solderable metal. Type VII is the usual call-out. Incomplete fill or a missing cap leaves a cavity that steals solder or a non-wettable surface that produces open joints. The via diameter, board thickness, and aspect ratio determine whether the fabricator can achieve a void-free fill; high-aspect-ratio holes are harder to fill completely. Designers should confirm the fabricator's minimum via size and maximum aspect ratio for filled-and-capped vias before freezing the layout. Thermal vias under power devices may use conductive fill, but the same planarization and capping steps are still required if the via is also a solderable land.
Process Limits That Drive the Choice
Hole diameter, finished board thickness, and copper plating thickness set the aspect ratio the fill process must handle. Small holes in thick boards are difficult to fill without voids. The fill material must survive the surface-finish chemistry and the reflow profile without excessive shrinkage or outgassing. Cap plating adds copper to the outer layers; on dense designs that extra copper can force wider clearances or a thinner starting foil. Fabricators publish capability matrices for tenting, plugging, and filling; designs that exceed those limits are either re-spun or accepted with higher scrap risk. The drawing should reference the fabricator's process capability or state the maximum acceptable void percentage and dimple depth so the incoming inspection has a measurable target.

What the Fabrication Drawing Must State
Call out the IPC-4761 type number and the side (or sides) for every via group that needs protection. State whether the fill is conductive or non-conductive. For Type VII, require planarization and copper capping so the surface is solderable. Reference the performance specification and revision that will be used for acceptance of voids, dimples, and plating. Confirm that the chosen via diameter and aspect ratio fall inside the fabricator's process window for that type. Identify any vias that must remain open for probing. The ipc 4761 type names remove ambiguity only when the drawing also records the side, the material class, the surface requirement, and the acceptance document. A type number by itself is not a complete process instruction.