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What Is the Purpose of a Via in a PCB?

Author : Alex Chen | PCB Design & High-Speed Engineering Specialist

October 29, 2026


A via is a metallized hole used to connect different conductive layers in a printed circuit board (PCB). During fabrication, a cylindrical hole is drilled through the PCB substrate, typically FR-4, and its inner wall is plated with copper. This plated barrel creates a conductive path in the Z-axis, perpendicular to the board surface, allowing electrical signals and power to move between layers.

In a multilayer PCB, such as a 4-layer, 6-layer, or 8-layer board, signal, power, and ground networks are distributed across different layers. Because copper traces on separate layers cannot normally connect directly, the via serves as the vertical interconnect between them. It is therefore one of the fundamental structures that enables three-dimensional PCB routing.

PCB via structure and layer interconnection

 

Core Function: Electrical Interconnection Between Layers

The primary purpose of a via is to provide a plated copper connection between conductive layers in the PCB stackup. A trace routed on the top layer can transition to an inner layer or the bottom layer through a via. Similarly, a power or ground plane can be connected to a component pad or another plane without routing a long trace across the board surface.

For the multilayer PCB design, this layer transition makes it possible to route dense signal networks within a limited board area. Vias also allow designers to change routing layers when traces encounter other nets, component keepouts, or mechanical restrictions.

 

Specific Technical Functions of Vias

1. Layer-to-Layer Signal Interconnection

Vias connect routing networks between the top layer, inner layers, and bottom layer. This is especially important in dense designs where the available routing space on a single layer is insufficient. A signal can leave a component on the top layer, transition through a via, continue on an internal routing layer, and change layers again when necessary.

Every layer transition introduces a physical discontinuity, so high-speed designs require careful control of via geometry and placement. The via barrel, pad, antipad, and any unused portion of the hole all contribute to the electrical behavior of the transition.

2. Power and Ground Distribution

Vias distribute power and ground from dedicated planes to individual functional blocks and component locations. A power via can connect a component pad to an internal power plane, while a ground via can connect the component or its exposed pad to a ground plane.

Multiple vias are often used when a connection must carry more current or when the design requires lower impedance. For power and ground connections, the via arrangement should provide a short and direct path to the corresponding plane. Long or narrow current paths increase parasitic inductance and can reduce the effectiveness of local decoupling.

3. Return-Path Optimization

High-speed signals require a continuous return-current path. When a signal changes routing layers, its return current must also transition appropriately through the reference structure. Ground vias placed near the signal via can help provide a short, low-impedance path for the return current.

If the nearest reference plane changes or the return path is interrupted, current may be forced to travel around an obstacle or cross a larger gap. This increases loop area and can increase electromagnetic interference (EMI). For this reason, via placement affects not only the outgoing signal path but also the complete signal-current loop.

4. Thermal Management

Thermal vias transfer heat from a component pad or exposed thermal region into the copper planes inside the PCB. A thermal-via array provides multiple parallel heat-conduction paths, helping spread heat over a larger copper area.

This structure is commonly used beneath packages that include exposed thermal pads. The effectiveness of thermal conduction depends on the via arrangement, copper area, board construction, and the thermal path available to the surrounding planes. An insufficient number of thermal vias can limit heat transfer and contribute to higher component junction temperature.

5. EMI Shielding

A row or array of ground vias can form a conductive via fence around a sensitive circuit, transmission line, or board edge. This structure can help contain electromagnetic fields and reduce coupling between neighboring regions.

The shielding effect depends on the spacing, continuity, and connection of the ground-via structure. A via fence should have a reliable connection to the appropriate ground reference. It is not a substitute for correct stackup design or signal routing, but it can support isolation when used together with a continuous reference plane.

6. Impedance Control

A via is part of a high-speed interconnect and must be considered when maintaining controlled impedance. Its electrical behavior is affected by hole diameter, pad diameter, antipad size, barrel length, adjacent copper, and the surrounding dielectric structure.

When a trace enters a via, the local field distribution changes. This can create an impedance discontinuity that causes partial reflection. Via dimensions should therefore be considered together with the trace width, dielectric thickness, reference-plane arrangement, and transition geometry rather than treated as an isolated mechanical feature.

 

Electrical Model of a Via

At high frequencies, a via cannot be regarded as an ideal wire. A simplified electrical model is:

Via ≈ series inductance (Lvia) + shunt capacitance (Cpad) + parasitic resistance (Rvia)

The inductive component is associated with the current flowing through the via barrel and the resulting magnetic field. The capacitive component is mainly related to the via pad, antipad, and nearby reference planes. The plated copper barrel also has finite resistance, although this resistance may be less dominant than the inductive and capacitive effects in many high-speed transitions.

These parasitic elements become increasingly important as signal edge rates increase. A signal with a fast transition contains significant high-frequency content even when its clock or repetition frequency is comparatively low. As a result, a via that appears electrically insignificant in a low-speed circuit can produce measurable distortion in a high-speed interface.

Via Stub Effects

A via stub is the unused section of a through-hole via that extends beyond the layer where the signal exits. This unused section behaves as a short transmission-line branch. At sufficiently high frequencies, it can resonate and reflect energy back toward the signal path.

The resulting reflection may cause ringing, overshoot, undershoot, or other waveform distortion. These effects can reduce signal quality and narrow the receiver's sampling margin. The severity depends on the stub length, signal rise time, interconnect impedance, and operating conditions.

Backdrilling can remove the unwanted portion of the via barrel and reduce the stub length. Blind vias and buried vias can also avoid some unnecessary barrel sections because they connect only the required layers. The appropriate solution depends on the stackup, manufacturing capability, routing density, and signal-speed requirements.

 

Common Via Types

1. Through-Hole Via or PTH

A through-hole via extends through the entire PCB and is formed using mechanical drilling followed by copper plating. It is widely used for conventional signal connections, power distribution, and ground connections. Although economical and easy to manufacture, a through-hole via may create long unused stubs when the signal connects only between selected layers.

2. Blind Via

A blind via connects an outer layer to one or more specified inner layers without passing through the entire board. Blind vias may be formed using laser drilling or controlled-depth mechanical drilling. They are commonly used in high-density interconnect (HDI) boards and for routing escape connections from fine-pitch BGA packages.

3. Buried Via

A buried via connects two or more internal layers and is not visible from the outer surfaces of the finished board. It is drilled and plated during an earlier lamination stage, before the complete multilayer structure is assembled. Buried vias can free space on the outer layers and support dense inner-layer routing, but they add manufacturing complexity.

4. Microvia

A microvia is a small laser-drilled interconnect. In the configuration described here, the hole diameter is no greater than 0.15 mm. Microvias are widely used in mobile devices and advanced HDI boards where conventional mechanical vias would consume too much routing space.

5. Via-in-Pad

A via-in-pad is located directly within a component pad. This arrangement is useful for high-density BGA and QFN packages because it provides a direct path from the pad to an internal layer while reducing the required breakout area.

Via-in-pad structures generally require the hole to be filled or otherwise processed so that solder does not drain into the via during assembly. The surface must also be suitable for forming a reliable solder joint. The manufacturing process therefore needs to account for hole filling, planarization, plating quality, and assembly requirements.

Comparison of PCB via types

 

Common Via Design Problems

Too Many Vias

Excessive via usage consumes routing area, increases manufacturing complexity, and can create dense regions where signals must pass around numerous obstacles. In high-speed sections, closely packed transitions may also increase coupling and crosstalk. Vias should therefore be used where they provide a clear electrical or routing benefit, rather than added indiscriminately.

Uncontrolled Stubs on High-Speed Signals

A high-speed signal routed through a through-hole via may encounter an unused barrel section. This stub can behave like an unwanted resonant structure and produce signal reflection. Backdrilling, blind vias, buried vias, or a different layer-transition strategy may be considered when the stub becomes electrically significant.

Insufficient Thermal Vias

Too few thermal vias can restrict the path from a component's thermal pad to the internal copper planes. The result may be inadequate heat spreading and a higher component temperature. Thermal-via placement should be evaluated together with the available copper area and the intended heat-flow direction.

Ground Vias Too Far from the Signal Transition

When a signal changes layers, placing the associated ground via too far away can force the return current to take a longer route. The larger current loop increases parasitic inductance and may increase EMI. A nearby ground-via connection can help maintain a more continuous return path, particularly when the signal transitions between reference-plane environments.

 

Conclusion

Vias are the basic structures that enable three-dimensional electrical interconnection in multilayer PCBs. They connect signal, power, and ground networks between layers, support thermal conduction, provide options for EMI control, and influence controlled-impedance transitions.

At the same time, every via has parasitic resistance, inductance, and capacitance. Its geometry and placement can directly affect signal integrity and power integrity, especially in high-speed designs. Effective via design therefore requires more than simply choosing a hole size. The via type, pad and antipad dimensions, stub length, reference-plane relationship, return path, thermal role, and manufacturing process must all be considered together.

Alex Chen | PCB Design & High-Speed Engineering Specialist Alex Chen | PCB Design & High-Speed Engineering Specialist

Alex Chen is a senior PCB design engineer with extensive experience in high-speed and high-density circuit design. He specializes in signal integrity, impedance control, and multilayer PCB layout optimization. At AIVON, he reviews and refines content related to PCB design principles, EDA tools, and advanced layout techniques. His expertise helps engineers avoid common design pitfalls and improve performance, reliability, and manufacturability in complex PCB projects.

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