Ripple voltage is the high-frequency AC component superimposed on a power supply's DC output. In a switching power supply, it is mainly caused by the rapid turn-on and turn-off of the switching devices. For a buck converter, ripple voltage is determined by the interaction among the inductor current ripple, output capacitor, equivalent series resistance (ESR), equivalent series inductance (ESL), parasitic resistance, parasitic inductance, switching frequency, load condition, and feedback-loop response.
Ripple reduction therefore requires more than simply increasing the output capacitance. The capacitor, inductor, switching frequency, current path, operating mode, and control loop must be considered as a complete system.
1. Increase the Output Capacitance
The output capacitor stores and releases charge to smooth the pulsating current delivered by the buck converter. When the output voltage tends to rise, the capacitor absorbs energy and charges. When the output voltage tends to fall, it releases energy to the load. Increasing the capacitance allows the capacitor to store and release more charge during each switching cycle, reducing the voltage variation at the output.
For a capacitor, the relationship between current and voltage is expressed as:
i = C × dV/dt
For a given ripple current, a larger capacitance produces a smaller rate of voltage change. Consequently, increasing the output capacitance can reduce the component of ripple voltage caused by capacitor charging and discharging.
In a buck converter, the inductor converts the switching waveform into a pulsating current, while the output capacitor smooths the resulting current at the load. A larger capacitor can absorb and release this pulsating current more effectively, reducing the amplitude of the output-voltage ripple.
However, capacitance alone does not determine the final ripple performance. The capacitor's ESR and ESL, its voltage rating, its ripple-current rating, its operating temperature, and its physical location on the PCB also affect the result. A physically large capacitor placed far from the converter may perform worse at high frequency than a smaller low-ESL capacitor located directly across the output current path.
2. Select Capacitors with Low ESR and Low ESL
A portion of the output ripple voltage is produced by the capacitor's equivalent series resistance. When ripple current flows through the ESR, it creates an instantaneous voltage drop. This voltage appears directly at the output and adds to the capacitive ripple.
The ESR-related component can be described by the approximate relationship:
VESR = ΔI × ESR
Accordingly, a higher ripple current or a higher ESR produces a greater ripple-voltage component. Low-ESR ceramic capacitors and solid-state capacitors can reduce this component significantly. Connecting several low-ESR capacitors in parallel also reduces the combined ESR and distributes the ripple current among multiple components.
ESL is also important when the switching edges are fast. The parasitic inductance of the capacitor terminals, vias, pads, and connecting traces produces an additional voltage according to:
VESL = L × di/dt
Low-ESL capacitors and short, wide current paths help reduce this high-frequency voltage spike. In practice, a combination of bulk capacitance and small high-frequency bypass capacitors is often used so that the output network can respond across a wider frequency range.
3. Understand the Relationship Between Ripple Current and Ripple Voltage
Ripple current is the AC component of the converter output current. In a buck converter, the inductor current is not constant. During each switching cycle, it rises while the switching device is conducting and falls while the switching device is off. This triangular or sawtooth current variation is the principal source of output ripple current.
- The capacitor charging and discharging component decreases as the output capacitance increases.
- The ESR component increases with ripple current and capacitor ESR.
- Parasitic resistance and inductance in the PCB current path add further voltage ripple and switching spikes.
These mechanisms explain why reducing ESR, controlling inductor ripple current, and minimizing the high-current loop area are all effective ripple-reduction techniques.
The same principle applies to the PCB layout. Reducing the equivalent resistance and equivalent inductance of the current path can improve the output waveform. Short traces, wide copper, appropriate via placement, and close positioning of the inductor and output capacitors help reduce parasitic voltage drops.
4. Increase the Switching Frequency Carefully
Increasing the switching frequency reduces the duration of each switching cycle. With the same inductor and the same current rising and falling slopes, a shorter interval produces a smaller change in inductor current during each cycle. This can reduce the output ripple voltage.
For example, if the current slope remains unchanged while the rising and falling intervals are reduced by half, the inductor-current ripple amplitude is also reduced by approximately half. The corresponding waveform comparison is shown below.
Higher frequency, however, is not an unconditional improvement. Switching losses generally increase as the switching frequency rises, which can reduce efficiency and increase thermal stress in the MOSFET and other power components. The frequency must therefore be selected by balancing ripple requirements, efficiency, thermal performance, and control-loop behavior.
5. Optimize the Output Inductor
The inductor value directly affects the inductor-current ripple. For a given voltage across the inductor, the current change is determined by the time integral of the voltage divided by the inductance:
ΔI = (VL/L) × Δt
A larger inductance produces a smaller current change during each switching interval and therefore reduces the output ripple current. The trade-off is that excessive inductance can slow the converter's transient response and may increase the physical size or cost of the magnetic component.
Under steady-state operation, the inductor current increases during the switch-on interval and decreases during the switch-off interval. The increase and decrease over one complete switching cycle must be equal:
ΔIon = ΔIoff
This is consistent with the volt-second balance principle. The net volt-second product across the inductor must be zero over one switching cycle, assuming the converter is operating in steady state and the inductor is not saturating.
The basic inductor relationships remain valid during both switching intervals. During the switch-on interval, the voltage across the inductor causes its current to increase. During the switch-off interval, the inductor voltage reverses and the current decreases. A larger inductance reduces the slope of both current transitions.
If the selected inductance is too small, the ripple current increases. Reducing the ripple voltage in that case may require a higher switching frequency, but the resulting MOSFET switching loss can reduce overall efficiency. The inductor value should therefore be selected together with the switching frequency and the required transient response.
6. Consider the Operating Mode and Load Current
Ripple voltage can be relatively high under light-load conditions. At light load, the converter may enter discontinuous conduction mode (DCM), in which the inductor current falls to zero during part of the switching cycle. The switching-node voltage and inductor-current waveform in DCM differ substantially from those in continuous conduction mode (CCM).
When the load is sufficient for CCM operation, the inductor current remains above zero throughout the switching cycle. The current waveform is continuous, and the output filter can often suppress the ripple more predictably.
Increasing the load current can move the converter toward CCM and may reduce certain ripple components. This is not normally a standalone ripple-reduction method because the load must be determined by the system's actual operating requirements. The converter should not be loaded unnecessarily merely to force a particular conduction mode.
7. Use an Interleaved Multiphase Controller
A multiphase controller divides the total output current among several parallel phases. Each phase carries a smaller portion of the load current, and the switching events are intentionally shifted in time. This interleaving prevents the current ripple of all phases from reaching its peak at the same instant.
- Phase displacement: The switching timing of each phase is offset so that the individual inductor-current ripple waveforms partially cancel at the output.
- Current sharing: Each phase carries only part of the total output current, reducing the current burden and ripple stress on each individual inductor and switching path.
- Higher effective ripple frequency: Multiple interleaved phases produce more ripple events per unit time. The higher effective ripple frequency makes the output filter more effective and reduces the remaining ripple amplitude.
For example, a two-phase system can create an effective ripple frequency higher than that of a single-phase converter. The exact cancellation and ripple reduction depend on phase count, duty cycle, current sharing, component matching, and the implementation of the control scheme.
8. Optimize the Feedback Loop
The feedback loop determines how the converter responds to changes in input voltage, load current, and switching conditions. A properly designed compensation network can improve dynamic response and reduce output-voltage deviations caused by load transients.
Feedback compensation does not replace a suitable power-stage design. The output capacitor, ESR, inductor, switching frequency, and operating mode all affect the power-stage response and must be considered when the compensation network is designed. If the loop response is poorly controlled, load changes can produce additional overshoot, undershoot, or low-frequency ripple even when the steady-state switching ripple is small.
Conclusion
Reducing ripple voltage in a buck converter requires coordinated optimization of the power stage, components, PCB layout, operating mode, and control loop. Increasing output capacitance reduces the charge-discharge component, while low-ESR and low-ESL capacitors reduce resistive and high-frequency parasitic contributions. A larger output inductor reduces inductor-current ripple, and a higher switching frequency can reduce the ripple amplitude at the cost of increased switching loss.
For higher-current designs, interleaved multiphase operation can distribute current and cancel ripple. At the same time, minimizing the resistance and inductance of the high-current PCB paths helps prevent additional voltage spikes. The most effective solution is normally a combination of these measures, selected according to the converter's load range, efficiency target, transient-response requirement, thermal limits, and available board area.
