Footprint libraries sit between the schematic and the assembled board. A part can be electrically correct and still fail in production if its land pattern does not match the real package, if the through-hole is the wrong size, or if the pads are not suited to the soldering process. This article covers the selection and verification requirements for PCB component libraries and footprints. It explains how to check existing libraries, how to establish and confirm libraries for new devices, how hole diameters should be serialized, and which footprint and process rules apply to SMT devices that must pass through wave soldering. The goal is to prevent assembly defects, poor solder fill, pad damage, and inaccurate test results before they reach the board.
Highlights:
- Existing footprints must be checked against the physical outline, lead pitch, and through-hole diameter; a through-hole should be 8 mil to 20 mil larger than the pin diameter, with tolerance allowance where needed to ensure good solder fill.
- Hole sizes should follow a controlled imperial series: above 40 mil in 5 mil increments, and below 40 mil in 4 mil decrements, including 36 mil, 32 mil, 28 mil, 24 mil, 20 mil, 16 mil, 12 mil, and 8 mil.
- New devices need libraries that match their datasheets and support the intended process, including reflow, wave soldering, and through-hole reflow; SMT parts exposed to wave soldering require surface-mount wave-solder pads.
Verifying Existing PCB Footprint Libraries
Selecting a component from an existing PCB footprint library is not a matter of trusting the library name. The footprint must be confirmed against the real device. The check should cover the package outline, lead pitch, and through-hole diameter. For through-hole parts, the hole and the pin must fit with a controlled tolerance. The hole diameter should be larger than the pin diameter by 8 mil to 20 mil. Where tolerance requires it, the allowance can be increased appropriately, but the design must still provide good solder fill through the barrel. A hole that is too tight makes insertion difficult and can prevent proper wetting. A hole that is too large can leave excess clearance and make the solder joint less reliable. The allowed range is therefore a process window, not an arbitrary target.
Hole sizes in a library should be serialized. At and above 40 mil, the series increases in 5 mil increments, that is, 40 mil, 45 mil, 50 mil, 55 mil, and so on. Below 40 mil, it decreases in 4 mil increments, that is, 36 mil, 32 mil, 28 mil, 24 mil, 20 mil, 16 mil, 12 mil, and 8 mil. When a component library is established, convert hole units to imperial (mil) and make the holes meet the serialization requirement. This keeps the library consistent and avoids one-off hole sizes that complicate tooling, documentation, and later reuse.
Table 1 gives the correspondence between device pin diameter and PCB pad hole, and between secondary power supply pin solder tails and through-hole reflow pad holes. The table provides a baseline for typical designs. The final hole size still has to respect the serialization rule and the tolerance of the specific part.
| Device pin diameter (D) | PCB pad hole / pin through-hole reflow pad hole |
|---|---|
| D ≤ 1.0 mm | D + 0.3 mm / +0.15 mm |
| 1.0 mm < D ≤ 2.0 mm | D + 0.4 mm / 0.2 mm |
| D > 2.0 mm | D + 0.5 mm / 0.2 mm |
Table 1. Pin diameter and PCB hole correspondence for pad holes and pin through-hole reflow pad holes.
Creating and Confirming Footprint Libraries for New Devices
For a device that is not yet in the PCB footprint library, the library must be built from the device data and then confirmed against the physical part. The silkscreen outline and the land pattern should match the component. This is especially important for new electromagnetic components, custom structural parts, and any device whose approval sheet or drawing defines the mechanical interface. The created library should be checked against those documents, not only against a nominal package name. The same device may also need more than one library variant so that it can be assembled by different processes. A new library should therefore cover the requirements of reflow, wave soldering, and through-hole reflow where those processes are possible. Using one compromise footprint for all processes can create avoidable assembly risk.
Wave-Soldering Requirements for SMT Devices
SMT devices that must pass through wave soldering require a surface-mount wave-solder pad library. The standard reflow land pattern is not the correct choice for this process. The wave-solder pad geometry must provide the solder access and process behavior needed when the board passes over the wave. Footprint selection therefore has to follow the assembly route, not just the package name.
Process and Application Constraints
The following rules address common problems that appear when library choices move into assembly and test. They cover axial parts, compatible relays, measurement jumpers, thermal expansion mismatch, manual soldering, and side-plated pins.
- 5.3.4 Keep the number of lead pitch variants for axial devices and jumpers as small as possible. Fewer variants reduce the number of forming and installation tools required.
- 5.3.5 Compatible devices with different pin pitches must have separate pad holes. For footprint-compatible relays in particular, the compatible pads must be connected by traces.
- 5.3.6 Manganin wire and similar resistance materials used as measurement jumpers must use non-metallized pads. If such a pad is metallized, the resistance segment inside the pad is shorted after soldering. The effective resistance length is then reduced and becomes inconsistent, which makes the test result inaccurate.
- 5.3.7 Do not use SMT devices as hand-soldered test or debug devices. During manual soldering, SMT devices are easily damaged by thermal shock.
- 5.3.8 Unless experimental verification shows no problem, do not select leadless SMT devices whose coefficient of thermal expansion (CTE) differs too much from that of the PCB. A large mismatch can cause pad pull-off.
- 5.3.9 Unless experimental verification shows no problem, do not use a non-SMT device as an SMT device. This can require manual soldering and results in low efficiency and low reliability.
- 5.3.10 When local side copper plating on a multilayer PCB is used as a soldering pin, every layer must be connected by copper foil to increase the adhesion strength of the plated copper. Experimental verification is also required. Without that verification, a double-sided board must not use side copper plating as a soldering pin.
These requirements connect library selection to the assembly process. Axial devices and jumpers affect tooling variety; compatible relays affect pad and trace layout; measurement jumpers affect test accuracy; CTE mismatch affects pad adhesion; manual soldering affects device survival; and side-plated pins affect mechanical strength. Checking these points at the library stage is cheaper than correcting them after the board is in production.
Related Reading:
PCB Material and Thermal Design Requirements for Reliable AssemblyPCB Basic Layout and Manufacturability Requirements for PCBA
PCB Routing and Reference Point Design Requirements
PCB Testability Requirements for Reliable ICT and Functional Test
Electrical Clearance, Creepage Distance, and Insulation Levels
