Testability is the mechanical and electrical agreement between a PCB layout and the fixture that will test it. A board can meet its electrical targets and still fail to enter volume production if the bed-of-nails fixture cannot reach critical nodes, if locating holes are missing or placed symmetrically, or if a tall component on the solder side prevents the probe plate from seating. The requirements below define that agreement for boards tested through test points. They cover fixture location, test-pad geometry, spacing and clearance, current capacity, safety isolation, connector access, in-circuit and functional test coverage, and protection of test pads during conformal coating.
Highlights:
- Test access is optional but conditional: if test points are not used, the related locating-hole, process-edge, hold-down, pitch, pad, and spacing requirements do not apply; if test points are used, those rules become mandatory.
- Test pads must be at least 1 mm × 1 mm, placed on 2.54 mm grid relationships, kept more than 125 mil from the board edge, and spaced more than 2.54 mm from each other and from solder-side components.
- Current and coverage rules drive pad count: each probe carries up to 2 A, so every additional 2 A requires another power and ground test point; ICT requires every node, while functional test requires access to adjustment points, ground, AC input, discharge capacitors, and selected SMT devices.
Test Strategy Determines Which Rules Apply
Test access is a design choice, but it is not a free choice. If the finished board is not tested through test points, the requirements covering locating holes, process edges, hold-down points, device pitch, test-pad shape and size, test-point spacing, and related clearances are not required. This conditional structure prevents a design without test points from being over-constrained by fixture rules that have no function. The test strategy should therefore be fixed early, because it determines the mechanical envelope of the board and how much area remains available on the solder side.
The same logic applies to connector-based testing. If the board is not tested through a connector or cable interface, the connector pitch rule and the requirement to route all test points to a connector do not apply. Once test points are used, however, the related requirements become mandatory. A board that is designed without a clear test strategy often ends up with a fixture that needs special probes, extra alignment features, or manual rework, all of which add cost and reduce repeatability.
Fixture Location and Board Handling
A PCB that is tested with a bed-of-nails fixture needs at least two locating holes. These holes must not be slotted or oblong, because a round pin in a slotted hole allows the board to shift during probe loading. The locating feature size should meet a diameter requirement of 3 to 5 cm. The locating holes should be placed asymmetrically on the board so that the board can be loaded into the fixture in only one orientation. Symmetric holes may appear convenient, but they allow the board to be reversed, which can damage probes or produce invalid test results.
A compliant process edge should be provided for fixture support and board handling. For boards longer or wider than 200 mm, compliant pressure-rod points should also be provided. These points give the fixture a controlled place to apply force so the board does not flex under probe pressure. Without them, a large board can bow during test, causing intermittent contact and unreliable readings. The process edge and hold-down points are therefore not cosmetic features; they are part of the mechanical interface between the board and the test system.
Test Point Geometry, Size, and Identification
Device pins that need to be probed should have a pitch that is a multiple of 2.54 mm. This keeps the probe array on a predictable grid and avoids custom probe spacing. SMT component pads must not be used as test points. An SMT pad is intended for solder attachment, not for repeated probe contact, and using it as a test target can damage the joint or contaminate the pad. Test points should be located on the solder side, although secondary power-supply circuits are exempt from this placement rule.
The shape and size of the test pad should follow the specification. Square pads are recommended, and round pads are also acceptable. The pad size must not be smaller than 1 mm × 1 mm. A pad below this size gives the probe too little contact area and makes the fixture sensitive to small alignment errors. Every test point should be labeled with a unique reference such as TP1, TP2, and so on. Clear labeling supports fixture debugging, fault isolation, and communication between design and test engineering.
All test points should be locked in the PCB data. In practice, this means that moving a test point requires an explicit property change rather than a simple edit. Locking prevents a test point from being shifted during late layout cleanup, which can silently invalidate the fixture program and the probe plate drilling data.
Spacing, Clearance, and Probe Density
Test points should be spaced more than 2.54 mm apart. The distance from a test point to a component on the solder side should also be greater than 2.54 mm. These clearances give the probe and its guide plate room to seat without touching adjacent features. Low-voltage and high-voltage test points must be separated in accordance with safety requirements. That separation is not only a creepage and clearance issue; it also prevents a probe or fixture feature from bridging two nodes at different potential.
A test point should be more than 125 mil from the PCB edge. It should also be more than 0.5 mm from a locating hole, leaving clearance for the locating post. Edge distance protects the probe from overtravel and prevents the pad from being damaged during board separation. Locating-hole clearance prevents the post from interfering with the test pad and keeps the probe force away from the alignment feature. Test-point density should not exceed 4 to 5 points per square centimeter, and the points should be distributed evenly. High local density makes the probe plate harder to manufacture and can concentrate force in one area of the board.
Current Capacity and Grounding
Each test probe can carry a maximum of 2 A. For every additional 2 A, one more test point must be provided for both power and ground. This rule prevents a single probe from becoming the current bottleneck and provides redundant return paths. It is especially important for boards with high-current rails, because a probe that is adequate for signal sensing is not necessarily adequate for power delivery. The power and ground test points should be treated as a pair so that current sharing and return current are both considered.
On digital logic boards, one ground test point should generally be provided for every 5 ICs. This gives the fixture a local ground reference near the logic devices and reduces the chance that a single ground probe becomes a shared return for too many measurements. The requirement is a guideline for distribution, not a substitute for the current-capacity rule.
Solder-Side Height and Mechanical Interference
On the solder side, component height must not exceed 150 mil. If a component exceeds this height, a list of the over-height components should be sent to the equipment engineer so the fixture can be given special treatment. This is a mechanical constraint: the probe plate and the fixture hold-down system need a flat, predictable surface to seat against. A tall component can lift the board, tilt the probe plate, or prevent adjacent probes from making contact. Identifying over-height parts early allows the test engineer to design a cutout, a taller probe, or a different support scheme instead of discovering the problem during first-article test.
Connector and Cable Test Access
If the board is tested through a connector or cable, the connector pin pitch should be a multiple of 2.54 mm, and all test points should be brought out to the connector. This makes the connector the single test interface and avoids probing small pads directly. Routing all test points to the connector also simplifies fixture design and makes the test interface more robust for repeated mating. If connector or cable testing is not used, these two requirements do not apply.
Test Coverage for ICT and Functional Test
Adjustable components should be used where the design requires adjustment. For in-circuit test, every node must have a test point. This is the defining coverage rule for ICT: the fixture is intended to check the assembled connections node by node, so an inaccessible node becomes an untested node. For functional test, test points are required for adjustment points, ground points, AC input, discharge capacitors, and SMT devices that need to be tested. The difference in coverage is intentional. ICT verifies connectivity and component presence, while functional test needs access to the nodes that are adjusted, energized, discharged, or measured during operation.
The requirement to use adjustable components supports this coverage model. If a functional test depends on tuning a value, the adjustment point must be reachable and the component must be adjustable. A fixed component in that position may pass ICT but leave the functional test without a valid adjustment path.
Obstructions and Conformal Coating
Test points must not be blocked by barcodes or other labels, and they must not be covered by adhesive. A test point that is physically present but hidden under a label is effectively absent from the fixture. If the board requires conformal coating, the test pads must receive special treatment so the coating does not prevent reliable probe contact. A coated pad can look present but behave as an insulator, so this is both a test-yield issue and a debug issue. The test pads should remain exposed, or the coating should be removed or masked in a way that is compatible with the probe and the coating process.
Together, these requirements turn testability into a set of layout decisions that can be checked before fabrication. Locating holes, process edges, pad geometry, spacing, current capacity, safety isolation, connector access, coverage, and coating protection all depend on the same early choice: whether the board will be tested through test points, and if so, how the fixture will reach every required node.
Related Reading:
PCB Material and Thermal Design Requirements for Reliable Assembly
PCB Component Library and Footprint Selection Requirements Guide
PCB Basic Layout and Manufacturability Requirements for PCBA Assembly
PCB Routing and Reference Point Design Requirements
Electrical Clearance, Creepage Distance, and Insulation Levels
