High-speed interfaces fail more often from poor differential pair layout than from schematic mistakes. USB 3.x, HDMI, Ethernet, PCIe and many sensor links rely on tightly controlled differential signals. When the pair spacing, length match or impedance drifts outside the interface specification, the result is bit errors, intermittent links or complete failure after the board leaves the fab.
This article walks through practical differential pair work in KiCad—from rule definition to routing and the manufacturing constraints that actually determine whether the design works. You will learn how to set net classes and differential rules, keep length and impedance under control, avoid the most common layout errors, and prepare files that fabricators can build correctly.
Why Differential Pairs Matter in Modern PCB Design
Single-ended traces radiate and pick up noise. Differential pairs cancel common-mode noise and radiate far less energy, which is why nearly every high-speed digital standard now uses them. The electrical requirement is simple: the two traces must stay the same length (within a few picoseconds) and maintain a constant differential impedance along their entire path.
In KiCad the tools exist to enforce these rules, but the software cannot invent the correct numbers. Trace width, gap and stackup must come from the interface specification and the manufacturer's process capability. Getting those numbers wrong is one of the most common reasons boards that "pass DRC" still fail in the lab.
Understanding Differential Pair Design
Signal Transmission Principles
A differential pair carries two complementary signals. The receiver looks only at the difference between them. Any noise that appears equally on both traces (common-mode noise) is rejected. For this cancellation to work, two conditions must hold:
- The two traces must remain the same length so the signals arrive at the same time.
- The geometry (width + gap + height above reference plane) must keep the differential impedance constant—typically 90 Ω for USB, 100 Ω for Ethernet and many HDMI/PCIe pairs, or 85–100 Ω depending on the exact standard.
Any abrupt change in spacing, an unnecessary via, or a large bend that forces one trace longer than the other creates impedance discontinuities and mode conversion. Those discontinuities show up as reflections and increased EMI.
Common Applications
- USB 2.0 / 3.x / Type-C – 90 Ω differential
- HDMI / DisplayPort – 100 Ω
- Gigabit and 10-Gigabit Ethernet – 100 Ω
- PCIe, SATA, LVDS camera links – usually 85–100 Ω
Each standard publishes a maximum intra-pair skew (often 5–15 ps) and a target impedance with a tolerance (commonly ±10 %). The layout must meet those numbers after fabrication tolerances are applied.
Setting Up Differential Pair Rules in KiCad
Net Classes
Open Board Setup → Design Rules → Net Classes. Create a dedicated class (for example "USB90" or "ETH100"). Assign the two nets of each pair to that class. In modern KiCad versions you can also define explicit differential pair rules that reference the net class. This single assignment drives both the interactive router and the DRC engine.
Trace Width and Spacing Rules
Inside the same net-class (or Differential Pair rule) set:
- Track width – the single-ended width that, together with the gap, produces the target differential impedance on the chosen stackup.
- Diff pair gap – the edge-to-edge clearance between the two traces.
- Via gap (if the pair must change layers).
These numbers are not arbitrary. They must be calculated from the manufacturer's stackup (dielectric thickness, Dk, copper weight). Most fabricators publish impedance calculators or will return the correct width/gap for a given stackup once you tell them the target impedance.
Do not rely on KiCad's default values. A 0.2 mm track with 0.15 mm gap may look fine on screen yet produce 75 Ω or 120 Ω after fabrication, depending on the dielectric height.
Manufacturing Perspective on Rule Setup
When the board goes to fabrication the copper width and dielectric thickness will vary within the process tolerance. A well-written rule therefore includes a small margin so that the finished board still sits inside the ±10 % impedance window. After you finish the layout, export the stackup and the differential rules and send them with the Gerbers. Fabricators such as AIVON can then confirm that the chosen width and gap are manufacturable on the selected process and return an impedance report if needed.
Routing Differential Pairs
Length Matching
KiCad's differential pair router can insert serpentine (accordion) patterns automatically. Use them only when the natural path difference exceeds the allowed skew. Keep the serpentine amplitude small and the period reasonably long; tight zig-zags increase crosstalk and can themselves create impedance discontinuities.
After routing, run the length-tuning tool and then the DRC length check. Document the final matched lengths in the design notes so the next engineer (or the test technician) knows the expected delay.
Avoiding Unnecessary Bends
Prefer 45° or gentle arcs over 90° corners. When a pair must turn, keep both traces on the same side of the bend so the length difference stays minimal. Never route one trace around a via or component while the other takes a straight path.
Maintaining Impedance
Stay over a continuous reference plane. If the pair must cross a plane split, add a stitching capacitor or change layers with a tightly coupled via pair. Avoid placing the pair near the board edge or next to aggressive single-ended clocks. When the pair changes layers, use a differential via pair with the same gap as the traces and keep the stub as short as possible (back-drill if the stackup allows).
Common Differential Pair Routing Problems
Incorrect Spacing
If the gap changes along the route (because the router had to dodge a via or the designer manually adjusted one track), the differential impedance jumps. DRC will catch hard clearance violations but will not flag a gradual change in gap unless you have defined a differential pair rule with a tight tolerance. Always visually inspect the pair after routing and re-run the interactive differential router if the gap has wandered.
Length Mismatch
A few millimetres of extra length on one trace is enough to violate USB 3.x or PCIe skew budgets. The classic mistake is routing the two traces independently and only noticing the length difference after the board is made. Use KiCad's length-tuning tool early and leave a short matching section near the receiver if possible—matching near the driver is less effective for some standards.
Signal Integrity Issues
Even with correct length and gap, a missing reference plane, an unstitched layer change, or a connector pinout that forces the pair to cross creates mode conversion. The result is increased common-mode radiation and reduced eye opening. These problems rarely appear in DRC; they appear on the scope or in the EMC chamber. The cure is disciplined plane management and early review of the connector pinout against the differential pairs.
After the layout is complete, run a full DRC, export Gerbers, drill files and the IPC-356 netlist, then perform a visual DFM check of the differential pairs. When the package is ready, engineers can submit the manufacturing files to AIVON for fabrication and assembly; the same files that passed KiCad DRC become the input for impedance-controlled production.
FAQ
Q1: How do I calculate the correct differential pair width and gap in KiCad?
A1: KiCad does not contain a field solver. Use the manufacturer's impedance calculator or a free tool such as Saturn PCB Toolkit with the exact stackup (dielectric height, Dk, copper weight). Enter the resulting width and gap into the net-class or differential-pair rule. Confirm with the fabricator before locking the design.
Q2: What is the maximum length mismatch allowed for USB differential pairs in KiCad?
A2: USB 2.0 typically allows ~150 ps (~25 mm on FR-4); USB 3.x is much tighter (often <15 ps). Convert the interface specification into millimetres using the actual propagation delay of your stackup, then set that value as the length tolerance in KiCad's design rules.
Q3: Can KiCad automatically maintain differential impedance while routing?
A3: The differential pair router keeps the gap you defined in the rule, but the absolute impedance still depends on the finished stackup. If the fab's dielectric thickness varies, the impedance will shift even if the copper geometry is perfect. Always include the stackup drawing with the Gerber package.
Q4: Why does my differential pair fail DRC even though the traces look parallel?
A4: Check that both nets belong to the same net class or differential-pair rule, that the gap is measured edge-to-edge (not center-to-center), and that no via or track is forcing a local widening. Also verify that the clearance rules for the surrounding nets are not tighter than the differential gap.
Q5: Do I need special Gerber settings for differential pairs?
A5: No extra layers are required, but include the stackup file, the impedance targets, and a note listing every differential pair and its matched length. Many fabricators will then run an impedance coupon or provide a measurement report. After the design is complete, the same manufacturing package can be uploaded for quotation and production.
