1. Definition of Kirkendall Voids
Kirkendall voids are vacancy clusters and microvoids that form at the interface between two dissimilar or compositionally different metals when the diffusion rates of their atoms differ significantly. This unequal atomic transport creates an imbalance in material movement, leaving vacancies that can accumulate and develop into voids.
The Kirkendall effect was discovered experimentally in 1947 by American chemist Ernest Oliver Kirkendall, after whom it was named. In electronic assembly, Kirkendall voids are most commonly found within or near the intermetallic compound (IMC) layer between a solder joint and a substrate, such as a Cu pad, or between a solder joint and a component terminal finish, such as Ni/Au. They are particularly associated with the ε-Cu3Sn phase.
2. Kirkendall Void Formation Mechanism
Diffusion is a fundamental process in solid materials. Examples include the migration of liquid-metal atoms toward solid nuclei during solidification, grain growth during recrystallization, decarburization and carburization of steel, and atomic transport during metal joining.
At a solder interface, the two metals do not necessarily diffuse at the same rate. During the formation of Cu3Sn, for example, Cu and Sn atoms migrate at different rates. This unequal diffusion produces a net flux imbalance. Vacancies are generated as a result, and they can migrate toward favorable nucleation sites, accumulate, and eventually form microscopic Kirkendall voids.
Published studies have reported Kirkendall voids at the Cu/Sn-37Pb interface in BGA solder joints after solid-state aging at 125 °C for 20 days. During Cu3Sn formation, the different diffusion rates of Sn and Cu create an imbalance in material transport, resulting in vacancies or small Kirkendall voids. Hydrogen introduced during electroplating can further accelerate vacancy accumulation and void formation.
When an electroless Ni-P alloy coating is present, diffusion from the Ni coating toward the solder can produce Ni3Sn4 and a thin Ni3SnP layer. Because Ni is consumed during its reaction with Sn, excess P accumulates at the Ni/IMC interface, producing a phosphorus-rich layer consisting of Ni3P and Sn. After Sn diffuses into the IMC layer, the interface between Ni3Sn4 and the phosphorus-rich Ni layer becomes susceptible to Kirkendall void formation in the solder-side region of the IMC.
3. Typical Characteristics
- Location: Kirkendall voids are mainly concentrated within the IMC layer or at an IMC interface, particularly at the Cu/Cu3Sn interface and at the Ni3Sn4/phosphorus-rich Ni interface.
- Morphology: The voids range from the nanometer scale to the micrometer scale. They may form a discontinuous or nearly continuous distribution along an interface.
- Time dependence: Kirkendall voids normally do not appear immediately after solder joint formation. They gradually nucleate, coalesce, and grow during solid-state aging.
- Temperature dependence: Higher temperatures increase atomic diffusion activity, accelerating both void formation and void growth.
- Hidden nature: Early in the life of a solder joint, the voids may be extremely small or absent. Consequently, initial mechanical tests, such as pull or shear testing, may not distinguish a latent-defect joint from a sound joint.
4. Main Causes
The fundamental cause is unequal diffusion between different atomic species, namely the Kirkendall effect. Several material and process conditions can intensify this mechanism.
Material System
Kirkendall voiding can be particularly significant when high-Sn lead-free solders, such as SAC305, are in direct contact with metals including Cu, Au, or Ag. The diffusion rates of Sn and these substrate or finish materials differ substantially, increasing the likelihood of vacancy accumulation at the reaction interface.
Thermal Aging
Long-term exposure to elevated temperature during product operation or storage greatly accelerates atomic diffusion. This is one of the most common conditions that promotes the nucleation and growth of Kirkendall voids. Because the phenomenon is time- and temperature-dependent, a joint that passes an initial inspection may deteriorate during service.
Substrate and Surface-Finish Preparation
Electroplated Cu substrates are more susceptible to void formation than rolled Cu substrates. Hydrogen introduced during electroplating is considered a catalyst for vacancy accumulation and can accelerate the development of voids.
In an ENIG finish, consisting of electroless Ni and immersion Au, Sn reacts with Ni to form Ni3Sn4. This reaction consumes Ni and causes excess P to accumulate at the interface, producing a phosphorus-rich layer consisting of Ni3P and Sn. This interface can become a preferred nucleation region for Kirkendall voids.
Soldering Process Abnormalities
Nonuniform solder composition or inadequate control of the soldering thermal history can create unfavorable conditions during the initial formation of the IMC layer. Peak temperature and time above the liquidus affect the initial IMC thickness and morphology, which in turn influence later diffusion and void evolution.
5. Reliability Hazards
The most difficult aspect of Kirkendall voids is that defective joints may not be identifiable during initial mechanical testing, even though they gradually deteriorate in service. As the voids grow and link together, the effective load-bearing area of the joint decreases and the IMC layer becomes more vulnerable to cracking.
Studies have examined Sn-37Pb and near-eutectic SAC solder joints connected to Cu or electroless Ni-P/immersion Au finishes and aged at 150 °C for 1,000 hours before miniature impact testing. After 500 hours of aging, numerous voids were observed in the Cu3Sn phase at the interface between SnPb or SAC solder and the Cu substrate. With increasing aging time, the fracture location changed from within the solder to within the IMC layer.
Interfacial microstructures and shear strength have also been evaluated for 96.5Sn-3.5Ag and 62Sn-36Pb-2Ag solder joints on Cu substrates after aging at 150 °C for 0, 50, 250, 500, and 1,000 hours. Cu6Sn5 was found near the solder, while Cu3Sn was located closer to the substrate. Kirkendall voids formed in the Cu3Sn phase as aging progressed. The shear strength of both solder systems decreased with aging time. The fracture mode changed from mixed fracture in the solder and IMC at the beginning of aging to complete fracture within the IMC layer after 1,000 hours.
In another evaluation, BGA assemblies using SAC solder balls on Cu substrates underwent isothermal aging at 100 °C, 125 °C, 150 °C, and 175 °C for 3, 10, 20, and 40 days, followed by drop and shear testing. Kirkendall voids were observed at the Cu/Cu3Sn interface. After aging at 125 °C for 3 days, the voids occupied 25% of the solder-pad interface. Void content increased with both aging time and temperature. After 10 days at 125 °C, drop performance was reported to be 80% lower than that of the unaged samples.
The principal reliability hazards include:
- Reduced mechanical strength: Voids reduce the effective connection area and compromise the mechanical integrity of the solder joint, lowering properties such as shear strength and impact resistance.
- Interfacial fracture: Voids act as stress-concentration sites. Under external stress from drops, impacts, or thermal loading, microcracks can nucleate and propagate from these regions, eventually causing brittle fracture within the IMC layer.
- Progressive performance degradation: High-temperature aging can sharply reduce the reliability of solder joints containing Kirkendall voids.
- Functional failure: When interfacial cracks propagate through the joint, they can create an electrical open circuit, disable the component, and prevent the product from operating.
6. Mitigation and Control Measures
Preventing Kirkendall voids requires particular attention to the material system and the thermal conditions experienced by the joint. Au, Ag, and Cu are generally susceptible to Kirkendall void formation when they interact with Sn. For high-temperature solder joints, the interface should therefore be designed to avoid direct contact between these metals and high-Sn solder whenever possible. A Ni diffusion-barrier layer is one approach for isolating Cu from the solder.
For Ni/Au finishes, the coating thickness and process parameters must be coordinated with the soldering temperature and time. The Au layer should dissolve completely into the solder during joining and allow a sound Ni-Sn IMC to form. This issue can be more likely at the bottom of a BGA, where the soldering temperature may be lower than in more exposed areas.
OSP finishes require careful evaluation in high-temperature applications. After soldering, OSP does not provide a metallic diffusion barrier between the Cu pad and high-Sn solder. The resulting direct Cu-to-solder interface can therefore be more vulnerable to Kirkendall void formation during long-term thermal exposure.
Material Selection and Design
- Use a diffusion-barrier layer: Avoid direct contact between high-Sn solder and Cu, Au, or Ag when the application requires extended thermal exposure. A Ni layer on a Cu pad, as used in an ENIG finish, can reduce mutual diffusion between Cu and Sn. The P content of the Ni layer must also be controlled.
- Optimize the solder alloy: Small additions of alloying elements such as Ni or Co may suppress diffusion and reduce the tendency for Kirkendall void formation. The effect depends on the specific solder system and process conditions, so the selected alloy should be evaluated for the intended application.
Process Control
- Control the reflow profile: Optimize the reflow curve and avoid unnecessarily high peak temperatures or excessive time above the liquidus. These measures help control the thickness and morphology of the initial IMC layer.
- Ensure finish quality: For ENIG and similar finishes, control coating thickness and process parameters to obtain a dense, defect-free coating. The Au layer should dissolve fully during soldering so that a suitable Ni-Sn IMC forms rather than leaving an unfavorable phosphorus-rich interfacial layer.
- Use OSP with caution: For products intended to operate at elevated temperature, evaluate OSP carefully because the final joint connects the solder directly to Cu and provides limited resistance to Kirkendall void development.
Product Quality and Reliability Evaluation
- Strengthen incoming inspection: Monitor the quality of PCB pad finishes and component terminal finishes, including coating thickness, uniformity, and potential process defects.
- Perform reliability evaluation: For products intended for high-temperature operation, conduct high-temperature aging during design verification, such as 125 °C for 1,000 hours. Combine the aging test with cross-section analysis and scanning electron microscopy to determine whether Kirkendall voids are present and to assess long-term reliability.
7. Evolution During Aging
Kirkendall voids preferentially nucleate and grow at the Cu/Cu3Sn interface. During the early stage of aging, an atomic mismatch region forms rapidly at this interface and subsequently evolves into Kirkendall voids. During the intermediate stage, the voids at the Cu/Cu3Sn interface show relatively large dimensions and high growth rates, and neighboring voids can merge significantly. Voids within the Cu3Sn layer generally exhibit smaller dimensions and slower growth, with less obvious coalescence.
During the later stage of aging, the spacing between voids at the Cu/Cu3Sn interface and within the Cu3Sn layer decreases. Coalescence becomes more pronounced, causing the average void size to increase while the total number of separate voids decreases.
As the Cu3Sn layer becomes thicker, both the number and size of Kirkendall voids generally increase. The growth index decreases as the Cu3Sn layer thickness decreases. However, Cu3Sn thickness does not strongly change the preferred nucleation location or the overall growth pattern. During aging, the number of voids typically increases first and then decreases as individual voids merge.
Higher impurity content increases the number, size, and growth rate of Kirkendall voids. The growth index also increases with impurity content. Throughout aging, impurity content does not significantly change the preferred nucleation location or the overall growth pattern. As with changes in IMC thickness, the void population can increase initially and then decrease as coalescence produces fewer but larger voids.
8. Summary
Kirkendall voids are latent solder-joint defects caused by differences in atomic diffusion. Their development depends strongly on time and temperature, which means that a joint can pass initial inspection yet lose reliability during storage or operation. The main risk is the gradual transformation of microscopic vacancies into interconnected voids that reduce the effective joint area, concentrate stress, promote IMC-layer cracking, and eventually cause electrical open circuits.
Effective control begins with the material interface. Diffusion barriers such as Ni can reduce direct interaction between high-Sn solder and Cu, while appropriate control of Ni-P finishes, Au thickness, solder alloy composition, and surface-finish quality can reduce conditions favorable to void formation. Reflow temperature, peak temperature, and time above the liquidus must also be controlled to obtain a suitable initial IMC structure. For high-temperature products, accelerated aging combined with cross-section and SEM analysis is necessary to reveal defects that may not be detectable through initial mechanical testing alone.
Understanding the relationship between diffusion imbalance, IMC growth, vacancy accumulation, void coalescence, and interfacial fracture allows PCB and assembly engineers to address Kirkendall voids at the material-selection, process-control, and reliability-verification stages.