Stage 1: First Contact with Analog
You are just stepping into the field. PMOS, NMOS, and BJTs are familiar names, but their device physics and practical characteristics are still vague. You are unsure what circuits to design and rely heavily on schematics from textbooks and magazine articles. Everything you read sounds convincing. Your work centers on small modules: perhaps a differential operational amplifier or a bandgap reference, where you run a few simulations, perform some hand calculations, and try to turn them into a paper to meet academic requirements. Overall, even seeing the term "op-amp" makes you uneasy. SPICE feels like a difficult and quirky tool.
Stage 2: Discovering Design and Parameters
You start to grasp what analog circuit design actually means. Textbooks are always open, and your scratch paper is full of hand calculations. You begin to reference and discuss parameters such as VDSAT, lambda (channel-length modulation), Early voltage, GBW (gain–bandwidth product), and fT. Sometimes your circuits match hand calculations; other times, the results diverge significantly. You become attentive to voltage, temperature, and process variations—talking about low-voltage, low-power systems, or occasionally weighing in on ultra–high-speed, high-precision topics. When you design, you ambitiously plan for a tape-out, even though it still feels distant. At this stage, you think SPICE is powerful, but AC analysis results that don't make sense frequently give you headaches.
Stage 3: Wrestling with PVT
You have wrestled with PVT variations for a while, but you still have few designs that worked end to end. Delivering a truly usable circuit feels very difficult. You are eager to build confidence yet unsure how. You read JSSC papers or PhD theses and feel that what they describe is one thing, but when it comes to actual silicon, the story changes. Metrics like VDSAT seem insufficiently precise. Default simulator settings no longer satisfy your needs, so you tweak simulator options or even try different simulators. Yet results are sometimes accurate and sometimes not. You turn to forums for guidance, where answers are vague and inconsistently useful. SPICE still seems good, but the documentation leaves much to be desired.
Stage 4: Learning from Tape-Out Failures
You have been through significant tape-out failures. You now know that delivering a robust circuit requires relentless attention to detail and a painstaking review of everything. You uncover many issues you never anticipated and realize that doing good analog design demands complete, end-to-end control over the problem. You go back and systematically relearn the foundational material—those textbooks you once sold after graduation. You study every relevant reference you can find, hoping to spark more insightful ideas. You clearly understand the performance metrics your circuit must achieve and accept that analog design is fundamentally the art of trade-offs. Yet you still struggle to define exactly what "reasonable" trade-offs are and how to choose among conflicting specifications. It can feel nearly impossible to design a circuit that is both appropriate and functional. You doubt that others really achieve the pristine claims they make—if you, being diligent and smart, feel overwhelmed, how could someone else truly be that much better? At this stage, SPICE's functionality feels limited; you often stare at "time step too small" error messages and occasionally create enormous simulation decks that bring both colleagues and computers to their knees.
Stage 5: Heavy Simulation and Tool Fatigue
You begin to feel that many competitors' designs are nothing special. You have a familiar design flow, yet you are unsure how to better optimize the tools. You have used scripts written by others, but when problems arise you don't always think to solve them with awk or Perl. You consume vast amounts of server time running simulations, convinced that with enough sweeps and corners you can sculpt each module into shape. Sometimes analog design feels unbearably tedious, and you consider walking away. SPICE is good, but compared to FastSPICE-class simulators it feels slow. You start to distrust AC analysis and replace it with large numbers of transient simulations.
Stage 6: No Best Design, Only the Most Suitable
You internalize that there is no absolute "best" design—only a design most suitable for a given set of constraints and use cases. You develop a methodology that is truly your own. You favor one or two simulation tools and can use them fluently to evaluate your circuits. You account for PVT thoroughly. You know how a given circuit topology has evolved over time and how to trim or tailor it for different applications. You pay close attention to power and area, and your tape-outs increasingly meet product requirements. Nonetheless, certain complex systems still elude your full grasp, and occasional unforced errors can lead to disastrous consequences. You now read JSSC more systematically—perhaps even keep it by your side for casual reading. SPICE feels like a great tool; you understand how to manage accuracy versus speed and can choose sensible simulation settings on demand.
Stage 7: System-Level Trade-Offs and Reliability
You start to understand the essence of analog design. Whether for high-precision systems or high-speed front ends, you develop your own viewpoints and hands-on heuristics. You can make system-level trade-offs across blocks to maximize overall performance and robustness. You investigate potential markets and craft your own product definitions. With the right methodology, you are confident your designs can be competitive. You can decompose functionality and specifications from top to bottom and understand every technical detail, along with how each trade-off will influence your product. Reliability becomes a core consideration. SPICE is a practical tool, and you embrace Monte Carlo simulations to assess yield and variability. You still grumble about slow servers, even though you often run jobs in the middle of the night.
Stage 8: Design by Instinct
Successfully taping out a chip becomes routine—like an experienced driver stopping at red lights and going at green. Defining and executing a product design happens almost subconsciously. You no longer need to iterate parameters endlessly; often a small amount of simulation suffices to complete a block. You can intuit whether a target specification for a given circuit block is technically feasible or not. You worry less about the exact noise figure, SNR, or distortion of every module; you primarily care that a satisfactory solution exists, and the fine-grained details feel secondary. You may even joke that many JSSC papers are just filler—and that the paper itself is too thin and fragile for any practical purpose. SPICE is something you use occasionally, but you don't depend on it; in many cases, inspecting operating points tells you much of what you need to know.
Stage 9: Mastery and Foresight
At this point, you know a broad range of circuits intimately and can anticipate where the next wave of technologies will head. You might run only a handful of simulations per year—or let a single deeply parametric simulation run for months. You rarely draw detailed schematics yourself. Most of your time is spent away from the bench, perhaps on a golf course or fishing on a Pacific island. Apart from the occasional appearance at ISSCC, you seldom talk about circuits. You understand the craft so well that you suspect most people would not truly follow the discussion anyway.
