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Why the Power Plane Should Be Smaller Than the Ground Plane

Author : Alex Chen | PCB Design & High-Speed Engineering Specialist

September 10, 2026


Content

On some PCB layouts, the power plane is inset relative to the GND plane. The reason for that inset is the 20H rule.

The 20H Rule

The 20H rule was proposed mainly to reduce electromagnetic radiation from the board. Where high-speed current exists, a related magnetic field exists. At the edges of the planes, the radiation behaves as shown below.

Edge radiation when power and ground planes have the same outline

When the ground plane and the power plane have the same outline, the electric field between them varies and radiates from the board edge as electromagnetic interference. The usual correction is to pull the power plane inward by a set distance so the electric field stays over the ground plane. That reduces the edge-radiation effect and improves electromagnetic compatibility (EMC).

The inset distance is the 20H distance. H is the dielectric thickness between the power plane and the ground plane. The 20H rule means the edge of the power plane should be set back from the edge of the 0 V plane by at least 20 times the spacing between those two planes.

After the inset, most of the electromagnetic field no longer radiates outward, so external EMI is reduced. The word "most" is required because an inset of 20H relative to the ground plane reduces field density by about 70%, not to zero. If more of the electric field must be kept inside the board, an inset of 100H can be used. In general, a 100H inset confines about 98% of the electric field. That is one reason boards use a plane inset.

Field confinement with a 20H or 100H power-plane inset

On many practical stackups, a strict 20H inset leaves too little area for routing. A common compromise is to inset the power plane 1 mm relative to GND. That still gives the board a useful amount of improvement.

The 20H rule also has conditions. A clear effect is expected only when the following are met:

  1. The power plane is an internal layer, and the layers immediately above and below it are both 0 V planes. Each of those 0 V planes must extend beyond the power plane by at least 20 times the dielectric thickness between that 0 V plane and the power plane.
  2. The total layer count of the PCB is greater than or equal to 8.

Alex Chen | PCB Design & High-Speed Engineering Specialist Alex Chen | PCB Design & High-Speed Engineering Specialist

Alex Chen is a senior PCB design engineer with extensive experience in high-speed and high-density circuit design. He specializes in signal integrity, impedance control, and multilayer PCB layout optimization. At AIVON, he reviews and refines content related to PCB design principles, EDA tools, and advanced layout techniques. His expertise helps engineers avoid common design pitfalls and improve performance, reliability, and manufacturability in complex PCB projects.

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