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PCB Power Stability Testing

Author : Alex Chen | PCB Design & High-Speed Engineering Specialist

October 20, 2026


At critical stages of power-system design, comprehensive testing of the power output is essential for verifying system stability and reliability. These tests evaluate how the power supply responds to rapidly changing load conditions and confirm that it can maintain a stable, reliable output under dynamic operating demands. Particular attention should be paid to overshoot and undershoot during power-up and power-down.

Power-output testing generally includes abnormal-output tests, defined test conditions, and systematic interpretation of the measured results. This testing is commonly performed during the design and evaluation of power ICs and complete power systems. The objective is to provide reliable data for optimizing the power system and ensuring that its output remains stable and controlled under different load conditions.

 

Key Power-Output Tests

Voltage Rise and Fall Tests

Objective: Evaluate the power supply's response characteristics during voltage rise and voltage fall.

Test content: Check whether glitches or negative-slope segments occur during the rising and falling voltage transitions. These abnormalities can adversely affect the system and the devices connected to the power rail.

Overshoot and Undershoot Tests

Objective: Determine whether a transient voltage exceeds or falls below the target value during a voltage transition.

Test content: Measure the overshoot and undershoot amplitudes relative to the actual steady-state output, and determine the time required for the output to return to its steady-state value.

Dip, Sag, and Surge Tests

Objective: Determine whether voltage dips, sags, or surges occur after the output has reached a steady state.

Test content: Measure the amplitude and duration of any dip, sag, or surge that occurs while the power supply is operating in a steady-state condition.

These tests verify that the power supply can provide a stable and reliable voltage under different operating conditions and load changes. The performance of the power supply is critical to the normal operation of every electronic device connected to its output. By performing these tests, designers can optimize the power system and confirm that it operates reliably across the intended operating range.

 

Test Conditions and Objectives

The purpose of the test is to verify that the output voltage and signals of the power supply under test meet the specified requirements during startup and shutdown. The test also evaluates whether the feedback design is underdamped or overdamped. The following conditions should be checked:

  • Whether voltage overshoot occurs.
  • Whether the output voltage falls back after the transition.
  • Whether oscillation or ringing occurs.

Input: The minimum and maximum AC or DC input voltages defined in the specification, together with the minimum and maximum AC input frequencies.

Output: The minimum and maximum output loads defined in the specification.

Temperature: The minimum operating temperature, room temperature, and maximum operating temperature.

 

Test Procedure

  1. Set the minimum specified ambient operating temperature, minimum input voltage and frequency, and maximum load.
  2. Turn the power supply under test on and off using each supported control method, such as AC on/off and remote on/off. Observe all output rails and signal lines, and record the test waveforms.
  3. Change the test conditions in sequence, including output load, input voltage and frequency, and ambient temperature. Repeat the preceding test.

Before the voltage enters its rising transition, and after the voltage falls below 10%, check whether a glitch is present. Also check whether a negative slope appears on the rising or falling edge of the voltage waveform.

Check for overshoot and undershoot. If either occurs, use the actual steady-state output as the reference and measure the overshoot voltage, undershoot voltage, and recovery time. The recovery time, designated as Tr, is the time from the first maximum overshoot point until the output returns to the steady-state value.

 

Understanding Glitch, Overshoot, and Undershoot

Glitch

A glitch is a brief, unintended disturbance or fluctuation in an electronic or digital system. It may result in incorrect system operation or other abnormal behavior. In a power system, a glitch can be caused by electromagnetic interference, power-supply noise, coupling between signals, or improper startup sequencing. Because a glitch may occur for only a short time, it can be missed if the oscilloscope time base or triggering conditions are not configured correctly.

Overshoot Testing

The primary objective of overshoot testing is to determine whether the system produces a transient voltage above the target value when the input signal or operating condition changes rapidly. The test evaluates whether the output exceeds its new steady-state value before settling.

  • Performance evaluation: Determine whether a transient overshoot occurs before the output reaches the new steady-state value.
  • Control-loop design: Verify that the control loop adequately regulates the response and prevents the output from exceeding the target value excessively.
  • Signal behavior: Evaluate the system's response to rapid signal or load changes and identify whether the transient response is properly controlled.

Undershoot Testing

Undershoot testing determines whether the output temporarily falls below the target value during a rapid change in the input signal or operating condition. As with overshoot, the key parameters are the magnitude of the transient deviation and the time required to return to the steady-state value.

  • Performance evaluation: Determine whether a transient undershoot occurs before the output reaches the new steady-state value.
  • Control-loop design: Verify that the control loop prevents the output from falling below the target value excessively.
  • Signal behavior: Evaluate the system's ability to respond to rapid transient changes without causing unacceptable output disturbance.

Overshoot and undershoot are both indicators of the system's dynamic response to a rapid change. Appropriate control-loop design, controller settings, and stability analysis can reduce their effects and help maintain stable operation. Excessive overshoot or undershoot can reduce the voltage margin available to downstream devices and may cause supply-sensitive circuits or logic signals to operate outside their intended range.

 

Distinguishing Sag, Dip, and Surge

Sag describes a temporary reduction in voltage, often visible over several cycles. It may be caused by a power-source fault, a transient overload, equipment failure, or another sudden event. In this context, sag generally refers to a voltage drop below 5% of Vout.

Dip also describes a temporary voltage reduction and is often used similarly to sag. In some contexts, however, dip is a broader term for a short-duration voltage disturbance that may include both a temporary reduction and fluctuation.

Surge describes a transient increase in voltage. It may result from sudden power disconnection, an abrupt load change, lightning, or another transient event. A surge can stress or damage electronic devices, so the power system must be designed to limit the resulting voltage disturbance.

Overshoot and surge are related but are not interchangeable in every context. Overshoot is commonly used to describe a control-system or signal-response characteristic in which the response temporarily exceeds the target before settling. Surge is more commonly used in power-system discussions to describe a transient increase in supply voltage.

 

Pass/Fail Criteria

  1. The power supply under test must start up and shut down normally without damage.
  2. No glitch may appear on any output rail or signal line.
  3. The overshoot, undershoot, and settling time Tr1, including oscillation and ringing, must meet the design requirements.
  4. Dip, sag, and surge on all output rails and signal lines must remain within the applicable design specifications, including voltage-regulation requirements and the specified high- and low-level limits for logic signals.

 

Corrective Measures

  1. For glitches, check the startup sequence of the internal power-control IC. In some cases, the problem may be related to an inadequate IC design.
  2. When a negative slope appears:
    • Check the startup sequence of different current paths inside the power supply, such as the fan-startup path.
    • Observe the PWM pulse behavior to determine whether the feedback circuit requires adjustment.
  3. For overshoot and undershoot, adjust the damping characteristics of the feedback circuit.

 

Interpreting Test Results

After the slew rate has been adjusted, follow the test items listed in the test worksheet. Apply the specified load and measure whether the output voltage overshoots. Record the measured overshoot voltage, Vovershoot, and overshoot duration, tos, in the test table.

Overshoot evaluation must consider both voltage and time. The duration for which the output exceeds its rated voltage determines the accumulated transient energy and therefore provides additional information beyond the peak voltage alone. A short, low-amplitude overshoot and a long-duration overshoot may have different effects even if their peak voltage values are similar.

 

Using the Output Inductor and Capacitor to Control Transients

Output Inductor Selection

The inductance value affects output ripple current and the dynamic response of the power supply. Selecting the output inductor requires a trade-off between output-current ripple and efficiency. 

Fsw is the switching frequency, and ΔIout is the output ripple current.

As indicated by the formula, increasing the inductance reduces the output ripple current. However, a larger inductance slows the dynamic response. If a smaller inductance is used while a low output-voltage ripple is still required, the switching frequency must be increased. This increases MOSFET switching loss and reduces circuit efficiency.

A commonly used design choice is to set the ripple current to ΔIout = 0.3Iout. When fast dynamic response is required, such as for the core power supply of an X86 processor, a smaller inductance may be selected. Typical values in this type of application are approximately 150 nH to 250 nH. When dynamic response is not a special requirement, a larger inductance, typically 600 nH or more, may be selected to reduce ripple current.

Output-Capacitor Selection

The output capacitor reduces output-voltage ripple and supplies transient current to the load. Under static operating conditions, the main consideration is the voltage ripple ΔV. The equivalent series resistance (ESR) of the output capacitor has a significant effect, and its maximum acceptable value is related to the output-voltage ripple and ripple current.

Output-voltage ripple relationship with capacitor ESR and ripple current

Once the inductor has been selected, ΔIout can be calculated. If a smaller output-voltage ripple is required, the output capacitor must have sufficiently low ESR.

Output-capacitor selection and voltage-ripple calculation

The output network should combine high-capacitance solid aluminum or tantalum capacitors with smaller ceramic capacitors. The total capacitance must provide sufficient short-term current support so that the power supply continues to operate correctly during large load transients.

For example, with a 0.47 μH inductor, the inductor ripple current is 2.6 A. With a 1 μH inductor, the ripple current is 1.2 A, and the output-voltage ripple is reduced.

The trade-off is reduced dynamic performance. During a load transient, such as a transition from full load to no load, a larger inductor requires more output capacitance to suppress the same output-voltage overshoot.

For Vover = 30 mV, Itran(max) = 6 A, and Vout = 1 V:

  • When L = 0.47 μH, the required minimum output capacitance is Cout(min) = 564 μF.
  • When L = 1 μH, the required minimum output capacitance is Cout(min) = 1,200 μF. In the actual DSP load-transient application, the load step is not this large, so two 470 μF capacitors are used.

Inductor and capacitor selection must therefore balance ripple current, output-voltage ripple, control-loop response, transient overshoot, and efficiency. These parameters should be verified under the complete set of input, load, and temperature conditions rather than evaluated independently.

Alex Chen | PCB Design & High-Speed Engineering Specialist Alex Chen | PCB Design & High-Speed Engineering Specialist

Alex Chen is a senior PCB design engineer with extensive experience in high-speed and high-density circuit design. He specializes in signal integrity, impedance control, and multilayer PCB layout optimization. At AIVON, he reviews and refines content related to PCB design principles, EDA tools, and advanced layout techniques. His expertise helps engineers avoid common design pitfalls and improve performance, reliability, and manufacturability in complex PCB projects.

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