During CAM preparation of a 4-layer flexible circuit measuring 10.91 mm by 451.8 mm, our team identified multiple process and data issues that required customer confirmation. The board uses rolled copper, is specified at 0.23 mm finished thickness, carries yellow solder mask on both sides with white silkscreen, requires impedance control together with a report, and is to be laser-formed as single pieces. Copper weights are listed as 1/3 oz and 1/2 oz, the minimum trace/space is given as 2 mil, hole size is 0.15 mm, and no stiffeners or adhesive are called out. The extreme aspect ratio of the circuit and the presence of sub-0.05 mm features together with a 0.18 mm BGA make material availability, etch capability, and impedance geometry particularly sensitive.
The main engineering questions centered on producing the board at 1/3 oz copper with a factory-matched stackup because trace/space falls below 0.05 mm and a 0.18 mm BGA is present; accepting exposed lines where solder-mask openings at bottom-side connector pads reveal underlying traces; adjusting and partially deleting characters because of space constraints; applying solder-mask ink plus coverlay in the BGA area because the pads are too small; substituting available 25 µm or 50 µm PI for the unavailable 38 µm inner-layer material; and recognizing that a single 0.108 mm line on inner layer G2, without reference-plane shielding copper, cannot support control of 100 ohm differential impedance.
Fine-Line FPC Manufacturing: Below 0.05 mm Trace Spacing and 0.18 mm BGA
The supplied data contain trace/space smaller than 0.05 mm and a BGA of 0.18 mm on the top layer. We proposed fabricating this version at 1/3 oz copper and submitted a matched material stackup for confirmation. On an FPC ( #FPC-20251210-0117 ), etch capability is strongly influenced by copper thickness; 1/3 oz copper permits finer lines and spaces to be resolved with acceptable undercut, whereas heavier copper would increase the risk of incomplete etch or excessive width reduction on features already below 0.05 mm. The 0.18 mm BGA further constrains annular-ring and pad definition, making the thinner copper advantageous for maintaining pad integrity after etching and surface finishing.
Figure 1: This stack can work but differential traces will need to be adjusted.
The accompanying stackup drawing pairs the 1/3 oz outer copper with available dielectrics to hold the 0.23 mm total thickness. Because the circuit is extremely long and narrow, uniform copper distribution and etch consistency along the 451.8 mm length become additional concerns; the thinner copper reduces the absolute variation that can accumulate over that distance. Confirmation of both the copper weight and the stackup allows the imaging and etch processes to be set before the inner layers are committed.
FPC Solder Mask Review: Exposed Traces at Bottom-Side Connector Pads
On the bottom layer the solder-mask openings at the connector pads expose underlying traces that run between the pads. We stated that production would follow the customer data, leaving these lines uncovered, and requested confirmation. In normal practice a mask opening is sized to the pad; when the opening is large enough to reveal adjacent traces, those traces become vulnerable to solder bridging, mechanical damage, or environmental exposure once the circuit is assembled.
Figure 2: The traces in the arrows will be exposed.
Because the order already specifies yellow solder mask and via cover, the exposure is a direct consequence of the supplied mask and copper artwork rather than a factory modification. On a long FPC the connector region may also experience flexing or handling stress, increasing the consequence of unprotected copper. Confirmation simply records that the customer accepts the exposed lines as shown in the data so that no mask or copper adjustment is introduced before imaging.
FPC Silkscreen Optimization for Limited Layout Space
Space constraints on the character layers required us to move legends and to delete portions of line frames on both the front and back sides. We submitted the adjusted artwork for confirmation. The circuit width of only 10.91 mm leaves minimal room for silkscreen once pads, mask openings, and any keep-out zones are observed. White silkscreen on both sides must therefore be relocated or truncated to avoid overlapping exposed copper or falling outside the laser-formed outline.
Figure 3: To avoid characters being printed on the pads, we will adjust the characters.
The deletions are limited to non-functional line-frame elements; critical reference designators are retained where possible. Because the board is delivered as single pieces with no process edge, all legend must lie inside the final outline. Acceptance of the moved and partially deleted characters locks the silkscreen data and prevents later requests to restore features that cannot fit.
BGA Pad Protection with Solder Mask Ink and FPC Coverlay
The pads in the BGA region are too small for reliable definition with solder mask alone. We recommended applying solder-mask ink together with a coverlay process in that area and requested confirmation. Coverlay (polyimide film with adhesive) provides a more durable and precisely apertured protection than liquid solder mask on very small pads, while the additional ink can fill or reinforce the openings. On a flexible PCB that already uses yellow solder mask elsewhere, the hybrid approach is localized to the BGA so that the remainder of the circuit stays consistent with the order.
The 0.18 mm BGA pitch leaves little margin for mask misregistration; coverlay apertures can be pre-punched or laser-defined to tighter tolerances. Because no stiffener is present, the coverlay also adds a measure of local mechanical support around the fine pads. Confirmation allows the BGA zone to be tooled with the combined process while the rest of the yellow mask is applied conventionally.
FPC Stack-Up Adjustment: Replacing Unavailable 38 µm PI Material
The stackup structure referenced in earlier correspondence specified 38 µm PI for the inner layer. That gauge is not available. Conventional matching PI base materials for this construction are 25 µm and 50 µm. We therefore noted the limitation and sought confirmation of an alternative. In FPC fabrication dielectric thickness is available only in discrete steps; 38 µm falls between the standard 25 µm and 50 µm offerings and cannot be sourced for the inner core or bondply.
Substitution of either 25 µm or 50 µm changes the dielectric spacing between copper layers and therefore affects both finished thickness and any impedance calculation. The overall 0.23 mm target must still be met by adjusting the remaining adhesive or coverlay thicknesses. Because impedance control and a report are required, the choice of 25 µm or 50 µm directly influences whether the trace geometries can be compensated to the intended values. Confirmation of the available material locks the stackup before impedance artwork is generated.
4-Layer FPC Impedance Control: Why Layer G2 Cannot Meet 100 Ohm Differential Impedance
Inner layer G2 contains only a single line of 0.108 mm. With no additional reference-plane shielding copper present, differential 100 ohm impedance cannot be controlled. We flagged this condition for confirmation. Differential impedance requires a defined pair geometry referenced to a continuous or adequately wide return plane; a solitary 0.108 mm trace lacks both the second conductor of the pair and the shielding copper needed to establish a stable return path.
Figure 4: There is only one 0.108mm trace in the G2 layer and no shielding copper in the reference layer.
The order explicitly requires impedance control and a report, yet the data on G2 do not support a 100 ohm differential structure. On a 4-layer FPC the inner layers are the natural location for impedance pairs; when one of those layers contains only an isolated line and the adjacent layers lack shielding copper, no calculation or process adjustment can produce a controlled differential impedance. The observation therefore indicates that either the impedance requirement does not apply to this net, the reference copper is missing from the data, or the net is not intended to be a differential pair. Clarification is required before any impedance compensation is attempted on G2.
4-Layer FPC CAM Review: Resolving Material, Fine-Line, and Impedance Challenges
The items in the main engineering query are linked by the constraints of a long, narrow, fine-feature FPC. The sub-0.05 mm trace/space and 0.18 mm BGA drive the use of 1/3 oz copper and a matched stackup. That stackup in turn depends on available PI gauges; the unavailable 38 µm material must be replaced by 25 µm or 50 µm, altering dielectric spacing. The same spacing affects whether impedance can be achieved, yet layer G2 as supplied cannot support 100 ohm differential control regardless of dielectric thickness. Independently, the exposed lines at connector openings, the necessary character deletions, and the hybrid mask-plus-coverlay treatment in the BGA area address local manufacturability and protection on the same circuit.
Each point requires explicit customer confirmation because it either highlights a data limitation, substitutes an available material, or modifies mask, legend, or protection relative to the original files. Once the copper weight, PI gauge, BGA protection method, character artwork, exposed-line acceptance, and impedance applicability are agreed, the stackup and working films can be frozen. The circuit can then proceed through imaging at 1/3 oz, lamination to 0.23 mm, laser forming, and surface finishing, with the impedance report generated only for those nets that the confirmed data can actually support. The case illustrates how CAM review of an extreme-aspect-ratio FPC with fine features and an impedance requirement commonly surfaces a cluster of material, geometry, and protection issues that must be resolved together before fabrication can begin.
