During CAM review of an 8-layer HDI order specified as 3-order HDI, our team identified multiple points that required customer confirmation before proceeding to tool generation and fabrication. The board uses Shengyi S1000-2M FR-4 with TG170, 1.6 mm finished thickness, 1 oz copper on both outer and inner layers, immersion gold surface finish, matte black solder mask, and white silkscreen. Impedance control is required, resin plugging is indicated for vias, and the design includes customer self-panelization. The engineering files did not include a clear layer-order document, and several drill and impedance details needed alignment with manufacturing capability.
The main engineering questions centered on whether certain blind vias could be laser-drilled, how specific via structures should be interpreted, whether the planned reference planes for 50 ohm traces on inner layers 3 through 6 were acceptable, whether the factory-optimized stackup and impedance calculation could be used, whether the judged layer sequence was correct, whether adjacent blind-via spans could be consolidated into a single fabrication layer, and whether added top-layer pads with solder-mask openings would be acceptable to meet process limits. These items directly affect drill programming, sequential lamination, impedance results, and final interconnect reliability.
HDI Blind Via Diameter and Laser Drilling Limitations
One of the first items raised was that certain blind vias exceeded 0.1 mm and therefore could not be produced by laser drilling at our facility. The order ( #HDI-20251210-0118 ) lists a 0.1 mm hole size and indicates 3-order HDI, yet the blind/buried via field on the order form is marked as none. In practice, a 3-order HDI construction on an 8-layer board implies multiple levels of blind or buried interconnects that are normally formed by laser microvias during sequential lamination.
Laser drilling is the standard method for creating the small-diameter, high-aspect-ratio blind vias that define HDI density. Most production laser systems are optimized for diameters at or below approximately 0.15 mm; larger openings may fall outside the process window for clean ablation, resin removal, and subsequent copper plating. When a blind via is larger than the laser capability, the alternative is mechanical drilling, which requires different tooling, larger capture pads, and often additional process steps that can affect registration and cost on a sequential build. Because the files contained blind features above the 0.1 mm threshold, we asked the customer to confirm the intended fabrication method and, if necessary, to accept either a process change or a design adjustment that would bring the features into the laser window.
Figure 1: The blind via is more than 0.1mm and we can't use laser to fabricate it
This confirmation is essential before drill files are finalized. An unconfirmed mix of laser and mechanical blind vias can lead to mismatched registration targets between sequential layers and can complicate the resin-plugging step already indicated on the order.
HDI Via Structure Identification and Hole Attribute Confirmation
A second point concerned a specific hole whose bottom landed on copper while the top side showed no pad. We requested confirmation of the attribute of this secondary hole. In HDI designs it is not uncommon to encounter vias that connect only on one side or that serve as transition features between build-up layers. Without an explicit attribute, it is unclear whether the feature is intended as a blind via, a buried via, a non-functional pad, or a special structure such as a via-in-pad that has been partially defined.
The presence of copper on the bottom side and the absence of a pad on the top side affect several process decisions: the direction from which the via is drilled, the copper plating sequence, whether the via must be filled before subsequent lamination, and how solder-mask openings are generated. Misclassification can result in an open circuit, an unintended short, or a plating defect that appears only after sequential lamination. Because the Gerber set lacked a complete layer-definition file, visual inspection of the arrowed feature was the only available method to flag the structure; customer confirmation was therefore required before the via could be assigned to the correct drill and plating recipe.
Figure 2,3: The hole indicated, its bottom side is on the copper foil and there is no pad on the top side
50 Ohm Impedance Control and Reference Plane Selection for HDI PCBs
The original files contained 50 ohm impedance requirements on inner layers 3, 4, 5 and 6. Our CAM calculation referenced layers 2 and 7 as the return planes for all of these traces. We asked the customer to confirm whether this referencing was acceptable.
In an 8-layer stack the choice of reference planes determines the dielectric thickness seen by each signal layer and therefore the trace width needed to achieve the target impedance. Layers 3 and 4 are typically adjacent to layer 2, while layers 5 and 6 are adjacent to layer 7; using the nearest continuous plane on each side is the conventional approach for stripline or dual-stripline geometries. If the customer intended a different reference (for example, a single plane or a non-adjacent layer), the dielectric distances and the resulting trace widths would change. Because the order does not request an impedance report, the only verification available is the customer's acceptance of the calculated geometry. Confirming the reference planes before stackup finalization avoids later respins of the inner-layer artwork.
Figure 4: We will take L2 and L7 layer as the reference layer for the fabrication of impedance control of inner layer 3,4 ,5 ,6 inn 50ohm.
HDI PCB Stack-Up Optimization and Impedance Calculation
After evaluating the impedance requirements against available Shengyi S1000-2M prepreg and core thicknesses, our engineering team prepared an optimized lamination stackup together with the corresponding impedance values. We submitted the proposal for customer confirmation.
The optimization considered the 1.6 mm finished thickness, the 1 oz copper weights, and the need to support three HDI orders. Adjustments typically involve selection of specific prepreg styles to control dielectric constant and thickness, placement of reference planes, and minor trace-width compensation. Because the original files did not supply a customer stackup drawing, the factory proposal becomes the working baseline once accepted. Acceptance also locks the dielectric thicknesses used for the 50 ohm calculations on layers 3–6, linking this item directly to the reference-plane question above. Without confirmation, the impedance artwork cannot be finalized and the sequential lamination sequence cannot be released.
Figure 5,6,7: Attached is the optimized stackup amd impedance control.
HDI PCB Layer Stack Verification Before Manufacturing
The Gerber package contained no dedicated layer-order or readme file. Our team therefore reconstructed the sequence from the available copper, solder-mask and drill layers and asked the customer to confirm that the judged order was correct.
Correct layer assignment is fundamental for an HDI board. Each sequential lamination step depends on knowing which copper layers are present at that stage and which blind vias connect which pair of layers. An inverted or swapped inner layer changes both the impedance environment and the drill-span definitions. Because the order also showed inconsistencies between the stated drill spans and the copper features they intersected, visual confirmation of the layer sequence was requested before any further tool generation. This step is closely related to the earlier observation that arrowed drill features did not match the through-layer information present in the files.
Adjacent HDI Blind Via Span Consolidation for Manufacturing
Inspection of the drill data showed that certain features spanned layers 6–7 and layers 7–8 and that each span was represented by two separate layers in the original files. Our proposal was to merge these into a single fabrication layer. We asked whether this consolidation was acceptable.
In sequential HDI construction, blind vias that connect consecutive layer pairs are normally drilled after the relevant sub-composite has been laminated. When two adjacent spans share the same drill diameter and the same process window, they can sometimes be combined into one drill program, reducing the number of laser or mechanical setups and simplifying registration. The merge is only valid if the vias do not require different plating thicknesses, different fill requirements, or different capture-pad sizes. Because the order already specifies resin plugging for vias, any consolidation must still allow the plugged vias to be processed correctly in the subsequent lamination. Customer confirmation ensures that the merged drill file will produce the intended electrical connections without introducing an extra process step or an open circuit.
HDI Pad Size Adjustment and Solder Mask Opening for Manufacturability
The customer documentation required certain features to be fabricated with copper. However, the spacing in the affected area was tighter than our standard process capability. To satisfy the process limits we added, on the top layer, pads that are 8 mil larger on each side than the original hole and opened the solder mask over those pads. We requested confirmation that this adjustment was acceptable.
Tight spacing between vias or between a via and adjacent copper can prevent reliable etch, plating, or solder-mask registration. Enlarging the pad provides additional copper for plating adhesion and compensates for etch undercut, while the solder-mask opening ensures that the enlarged pad remains free of mask material if the feature is intended to be solderable or if it must accept resin plug material. The 8 mil single-side increase is a typical compensation value when the original annular ring falls below the minimum needed for the chosen copper weight and surface finish. Because the board uses immersion gold and resin plugging, the added copper and the mask opening must still meet the plating and filling requirements. Confirmation from the customer locks the modified artwork and prevents a later request to restore the original, non-manufacturable geometry.
HDI PCB CAM Review: Key Manufacturing Risks and Customer Confirmations
Taken together, the items raised in the main engineering query address the practical limits of producing a 3-order HDI structure on an 8-layer Shengyi S1000-2M stack. Laser capability constrains the blind-via diameters that can be used; via-attribute clarification prevents misinterpretation of asymmetric connections; reference-plane and stackup confirmation fixes the impedance geometry; layer-order verification and via-span consolidation define the sequential lamination and drill programs; and the pad-addition step resolves a local spacing violation while preserving the copper requirement.
None of these points can be resolved unilaterally. Each requires an explicit customer decision because the original files either omitted the necessary definition or contained features that fell outside standard process windows. Once the confirmations are received, the drill files, impedance artwork, stackup drawing and solder-mask data can be frozen and the job released for sequential lamination. Until that point the manufacturing risk remains the possibility of an incorrect interconnect, an out-of-tolerance impedance, or a non-producible geometry that would only become apparent after the first lamination cycle.
The case illustrates a common situation in HDI CAM: the combination of missing layer documentation, mixed via sizes, and tight local spacing forces a set of targeted questions rather than a single global change. Addressing each item with the specific proposal that matches factory capability keeps the design intent intact while bringing the board inside the process window for laser drilling, resin plugging, impedance control and sequential build-up.
