Switch-mode power supplies convert one DC voltage level to another by storing and releasing energy through inductors, capacitors, and transformers under high-frequency switching control. Different converter topologies trade off voltage conversion range, component stress, complexity, galvanic isolation, ripple, and efficiency.
This article summarizes twelve commonly used switching power supply topologies and presents the core steady-state relationships and first-order sizing calculations used during early-stage design. Unless otherwise noted, the equations assume continuous conduction mode (CCM) and ideal components. Final designs must account for semiconductor losses, magnetic losses, parasitics, control-loop dynamics, thermal constraints, and appropriate design margins.
General Assumptions and Notation
The following notation is used to keep the equations consistent across the different topologies:
- Vin: input voltage
- Vout: output voltage
- D: duty cycle, or the fraction of each switching period for which the main switch is ON
- fs: switching frequency
- Ts: switching period, where Ts = 1/fs
- L: inductor or relevant magnetizing inductance
- C: output capacitor
- ΔIL: inductor current ripple
- ΔVout: output voltage ripple
The first-order calculations assume ideal switches and diodes, zero parasitics, ideal magnetic components, and no power losses. In CCM, the calculations rely primarily on inductor volt-second balance and capacitor charge balance.
These relationships are useful for topology selection, feasibility checks, and initial component sizing. Detailed design verification should additionally consider device characteristics, ESR and ESL, transformer leakage inductance, snubber or clamp behavior, thermal limits, and control-loop stability.
Non-Isolated Switching Power Supply Topologies
1. Buck Converter: Step-Down Conversion
The buck converter reduces a higher input voltage to a lower output voltage. Its basic power stage contains a controlled switch, a diode or synchronous rectifier, an output inductor, and an output capacitor. During the ON interval, the inductor is energized by the difference between Vin and Vout. During the OFF interval, the inductor continues supplying current to the load.
Because of its relatively simple structure and efficient step-down operation, the buck converter is widely used for point-of-load regulation.
- DC conversion ratio in ideal CCM: Vout = D · Vin
- Inductor ripple: ΔIL = (Vin - Vout) · D / (L · fs)
- Inductor sizing: choose a ripple fraction k = ΔIL/Iout, such as 20-40%, then L ≈ (Vin - Vout) · D / (k · Iout · fs)
- Output ripple from the capacitive component: ΔVout ≈ ΔIL / (8 · C · fs)
- ESR contribution: ΔVESR ≈ ΔIL · ESR
A typical first-pass design sequence is to select the switching frequency and allowable current ripple, calculate the inductance, and then select the output capacitor based on ripple and transient requirements. Switch and diode ratings, thermal performance, and control-loop stability must then be verified.
2. Boost Converter: Step-Up Conversion
The boost converter produces an output voltage higher than the input voltage. The input inductor stores energy while the switch is ON and releases that energy to the output through the diode or synchronous rectifier during the OFF interval.
- DC conversion ratio in ideal CCM: Vout = Vin / (1 - D)
- Inductor ripple: ΔIL = Vin · D / (L · fs)
- Inductor sizing: choose k = ΔIL/Iin(avg), then L ≈ Vin · D / (k · Iin(avg) · fs)
The output capacitor receives energy in pulses during the OFF interval, so its capacitance must be selected according to the allowable output ripple and load-transient requirements while accounting for ESR.
As the desired output voltage increases, both the switch and output diode experience increased voltage stress. The corresponding increase in duty cycle also affects conduction and switching losses as well as EMI behavior.
3. Inverting Buck-Boost Converter
The inverting buck-boost converter generates an output voltage with polarity opposite to the input. During the ON interval, the switch stores energy in the inductor. During the OFF interval, the stored energy is transferred through the diode to the output with reversed polarity.
- DC conversion ratio in ideal CCM: Vout = -[D / (1 - D)] · Vin
- Inductor ripple: ΔIL = Vin · D / (L · fs)
- Inductor sizing: similar to the boost converter, based on the desired input current ripple fraction and switching frequency
The topology is not galvanically isolated even though its switching arrangement produces an inverted output. Compared with a basic buck converter, the input and output capacitors can experience higher ripple currents, which must be considered during component selection.
4. SEPIC Converter
The Single-Ended Primary Inductor Converter, or SEPIC, provides a non-inverting output that can be either above, equal to, or below the input voltage. It uses two inductors, which may be magnetically coupled, together with a series energy-transfer capacitor.
- DC conversion ratio in ideal CCM: Vout ≈ Vin / (1 - D)
- Inductor ripple: ΔIL ≈ Vin · D / (L · fs) for each inductor
- Series capacitor: must support the AC transfer current while maintaining acceptable voltage ripple relative to its DC bias
- Output capacitor: selected according to output ripple and transient-response requirements
SEPIC is useful when the input voltage varies around the desired output voltage, such as in battery-powered systems where the input can move above or below the regulated output. The additional energy-transfer components increase circuit complexity and can result in higher RMS currents.
5. Cuk Converter
The Cuk converter produces an inverted output while providing low input and output current ripple through its inductor arrangement and series energy-transfer capacitor.
- DC conversion ratio in ideal CCM: Vout = -[D / (1 - D)] · Vin
- Inductor ripple: determined by the input and output voltage conditions; inductance values are selected according to the desired ripple fractions
- Energy-transfer capacitor: sized for the required AC current and acceptable voltage ripple, with particular attention to RMS current capability
Properly designed coupled inductors can further reduce ripple. However, the energy-transfer capacitor experiences significant electrical stress, and the switching structure requires careful attention to EMI and component ratings.
6. Zeta Converter
The Zeta converter is a non-inverting counterpart to the Cuk converter. It uses a similar series energy-transfer capacitor and two inductors and can both step the input voltage up and step it down while maintaining the same output polarity.
- DC conversion ratio in ideal CCM: Vout ≈ [D / (1 - D)] · Vin
- Inductor ripple: determined primarily by Vin and D; inductors are selected for the desired ripple fraction
- Energy-transfer capacitor: selected according to ripple and RMS current requirements
Zeta is useful when non-inverting step-up/step-down conversion is required. Depending on the inductor configuration and coupling, it can provide smoother input current behavior than a comparable SEPIC implementation.
Isolated Switching Power Supply Topologies
Isolated converters use a transformer to provide galvanic isolation between the input and output while also establishing the required voltage conversion ratio. The transformer turns ratio is defined here as N = Ns/Np, where Ns is the secondary turns count and Np is the primary turns count.
Depending on the topology, the transformer's magnetizing inductance may primarily store energy or participate in energy transfer. Primary switch voltage stress, duty-cycle limits, transformer reset, leakage inductance, and clamp behavior are therefore important design considerations.
7. Flyback Converter
The flyback converter stores energy in the transformer's magnetizing inductance while the primary switch is ON and transfers that stored energy to the secondary side after the switch turns OFF. Its relatively simple structure makes it suitable for lower-power isolated conversion.
- DC conversion ratio in ideal CCM: Vout = [D / (1 - D)] · N · Vin
- Magnetizing current ripple: ΔIm = Vin · D / (Lm · fs)
- Primary switch voltage: Vsw ≈ Vin + Vreflected
- Reflected output voltage: Vreflected = Vout · (Np/Ns)
Actual switch stress also includes voltage spikes caused by transformer leakage inductance. Snubbers or clamp networks are commonly used to manage this leakage energy. The duty cycle must also leave sufficient OFF time for energy transfer and transformer operation.
A first-pass design therefore involves selecting the turns ratio to keep switch and secondary-side stresses within acceptable ranges, choosing Lm according to the desired current ripple and peak current, and sizing the output capacitor for ripple and transient requirements.
8. Forward Converter
The forward converter transfers energy directly to the output while the primary switch is ON. An output inductor smooths the transferred energy, producing lower output ripple current than the corresponding flyback arrangement.
The transformer core must be reset after each switching cycle. This can be achieved with a reset winding or an active-clamp arrangement.
- DC conversion ratio in ideal CCM: Vout ≈ D · N · Vin
- Output inductor ripple during ON: ΔIL ≈ (N · Vin - Vout) · D / (L · fs)
- Output inductor voltage during OFF: approximately -Vout
The reset mechanism establishes an important duty-cycle constraint. With simple passive reset, D is typically constrained below 0.5. The topology is suitable for medium-power applications, but transformer reset, switch stress, and magnetic design require careful attention.
9. Push-Pull Converter
The push-pull converter uses two switches to drive a center-tapped transformer primary alternately. Energy is delivered to the secondary during both half-cycles, making efficient use of the transformer core.
- DC conversion ratio in ideal CCM: Vout ≈ D · N · Vin per half-cycle, with D referring to the ON time of each switch
- Duty-cycle limit: typically D ≤ 0.5 to provide reset time and prevent switch overlap
- Switch voltage stress: approximately 2 · Vin, plus additional spikes caused by leakage inductance
Flux balance is critical. Any significant imbalance between the two switching intervals can drive the transformer core toward saturation. Timing symmetry, transformer construction, and leakage-energy management therefore have a direct impact on reliability and efficiency.
10. Half-Bridge Converter
The half-bridge converter uses two switches and a split bus or midpoint capacitor arrangement to apply alternating voltage to the transformer primary. The primary sees approximately +Vin/2 and -Vin/2 during the respective switching intervals.
- Primary voltage: approximately ±Vin/2
- DC conversion ratio in ideal CCM: Vout ≈ D · N · (Vin/2)
- Switch voltage stress: approximately Vin, excluding additional switching spikes
The half-bridge provides a practical compromise between circuit complexity and semiconductor voltage stress for medium-power applications. Capacitor voltage balancing, transformer operation, and leakage-energy management are important parts of the design.
11. Full-Bridge Converter
The full-bridge converter uses four switches to apply the full bus voltage alternately across the transformer primary. The topology is well suited to higher-power conversion because it makes effective use of the transformer and distributes the switching function across multiple devices.
- DC conversion ratio in ideal CCM: Vout ≈ D · N · Vin
- Switch voltage stress: approximately Vin, excluding additional switching spikes
- Key design considerations: current sharing, timing symmetry, transformer utilization, and switching transitions
Full-bridge converters can accommodate wide input ranges and high power levels. Secondary-side synchronous rectification can be used when improved efficiency is required. Phase-shifted full-bridge control can also enable zero-voltage switching and reduce switching losses at higher power.
12. LLC Resonant Converter
The LLC resonant converter uses a resonant tank consisting of a series resonant inductor Lr, resonant capacitor Cr, and parallel magnetizing inductance Lm. Instead of relying on a simple duty-cycle relationship, the converter regulates its output through the resonant network and switching frequency.
- Resonant frequency: determined by Lr and Cr
- Magnetizing-to-resonant inductance ratio: Lm/Lr affects magnetizing current and no-load behavior
- Transformer turns ratio: N establishes the nominal conversion range
- Gain: depends on normalized switching frequency and load conditions
LLC converters are designed around soft-switching conditions to reduce switching losses and support high efficiency. The operating point is generally selected around the resonant region while maintaining the required regulation range and soft-switching behavior across input and load variations.
Unlike buck, boost, and basic isolated PWM converters, LLC does not have a simple linear duty-cycle-to-output-voltage equation. First-order design therefore relies on resonant gain characteristics, transformer turns selection, and verification of the required operating range.
Component Sizing and Calculation Practices
Although these twelve topologies use different power-stage arrangements, the initial design process follows the same general logic. Begin by defining the input voltage range, target output voltage, load range, allowable ripple, efficiency target, isolation requirement, thermal limits, and available board space. These requirements help determine which topology is appropriate before detailed component calculations begin.
Once a topology has been selected, establish its ideal conversion ratio and determine the required duty cycle or transformer turns ratio. Choose the switching frequency with both magnetic-component size and switching losses in mind. Higher switching frequencies can reduce the required inductance and capacitance, but they can also increase switching losses and EMI, so the frequency should be selected as a system-level trade-off.
The next step is to calculate the inductance and capacitance needed to meet current-ripple and output-ripple targets. For an inductor operating in CCM, the minimum current should remain non-negative:
[ I_{\min}=I_{\mathrm{avg}}-\frac{\Delta I}{2}\geq0 ]
The peak current is [ I_{\mathrm{pk}}=I_{\mathrm{avg}}+\frac{\Delta I}{2} ]
These values help establish the required saturation-current rating and semiconductor current capability. Capacitor selection must account for both capacitance and ESR, as well as RMS current. This is especially important in boost, SEPIC, Ćuk, and Zeta converters, where energy-transfer capacitors can carry substantial AC current.
Semiconductors and magnetic components must then be selected against the worst-case operating conditions rather than the nominal conversion ratio alone. Voltage ratings should allow sufficient margin for switching transients and leakage-inductance spikes, while current ratings must accommodate peak and RMS currents. Transformer turns ratio, core selection, reset behavior, and coupled-inductor characteristics should be verified for the selected topology. LLC designs additionally require careful evaluation of the resonant tank and soft-switching range.
Finally, verify the design through simulation and prototype testing. Include parasitic elements, actual ESR and ESL, gate-drive behavior, dead time, and other non-ideal characteristics in the analysis. Measure ripple current, output ripple, efficiency, and thermal performance across the expected input and load ranges. Snubbers, clamps, and control compensation can then be adjusted to improve stability, EMI performance, and long-term reliability.
How to Select the Right Converter Topology
The ideal conversion equations provide the starting point, but topology selection ultimately depends on several interacting design requirements.
Power level is one of the primary considerations. Flyback and other single-ended converters are commonly associated with lower-power designs, while forward, half-bridge, and full-bridge structures can support higher power levels with different tradeoffs in component count, stress, and control complexity.
Input-to-output voltage relationship also narrows the available choices. A buck converter is appropriate when Vout is below Vin, while a boost converter is used when Vout must exceed Vin. Buck-boost, SEPIC, Zeta, and Cuk structures provide additional flexibility when the input can move above or below the required output voltage.
Isolation and polarity further influence the decision. Isolated topologies are required when galvanic isolation is part of the system architecture. Inverting buck-boost and Cuk converters are useful when a negative output rail is required, while SEPIC and Zeta maintain the input-output polarity.
Control complexity and EMI become increasingly important as power density and switching frequency rise. Resonant and soft-switching topologies can reduce switching losses and EMI under appropriate operating conditions, but they require more complex power-stage and control design.
Finally, component stress and cost must be evaluated together. The ideal conversion ratio alone does not reveal the practical voltage and current stresses on switches, diodes, capacitors, inductors, and transformers. Identifying the most highly stressed components early helps determine whether a topology can meet the required reliability and thermal targets without unnecessary cost.
Conclusion
The twelve topologies covered here represent the core architectures used for a wide range of DC-DC conversion requirements. Buck and boost converters provide straightforward step-down and step-up conversion, while buck-boost, SEPIC, Cuk, and Zeta extend the available voltage and polarity options. Flyback, forward, push-pull, half-bridge, and full-bridge converters introduce galvanic isolation with different power-stage and transformer requirements, while LLC uses resonant operation to support soft switching and high-efficiency conversion.
The ideal equations are most useful at the beginning of the design process. They help establish the conversion ratio, duty cycle, inductance, capacitance, current ripple, and transformer relationship needed for an initial architecture. The resulting values should then be refined using real semiconductor characteristics, magnetic behavior, parasitic effects, thermal constraints, control-loop requirements, and prototype measurements.
