Why Your Switching Power Supply Efficiency Is Low: Loss Mechanisms and Optimization Methods

Every energy-conversion system inherently has losses, so a power supply with 100% conversion efficiency does not exist in practice. However, a well-designed switching-mode power supply (SMPS) can easily exceed 95% efficiency, while an excellent synchronous buck converter can reach 97% efficiency and maintain high performance even under light-load conditions.

Why do some step-down DC-DC converters run hot with efficiency below 80%, while others operate efficiently at low temperature? Using the conventional buck converter as an example, this article analyzes the major loss mechanisms in switching power supplies and presents practical methods for component selection, power-stage architecture, and control-strategy optimization.

1. A High-Efficiency Buck Converter: What Enables 97% Efficiency?

Figure 1 shows a synchronous buck converter with measured efficiency reaching 97%. Its efficiency remains high even under light-load operation.

Figure 1 | The buck converter uses low-on-resistance MOSFETs and synchronous rectification to achieve the efficiency shown.

The basic design approach is straightforward: identify every significant loss in the SMPS and then optimize the dominant contributors. Switching power-supply losses can be divided into two broad categories:

• Active-device losses: MOSFET losses and freewheeling-diode losses, which often account for a substantial portion of total power dissipation.
• Passive-device losses: Inductor and input/output capacitor losses. Low-cost inductors and capacitors with high parasitic resistance can significantly increase total power consumption.

During power-IC selection, the controller architecture and integrated power devices must be evaluated together. The high-efficiency design shown in Figure 1 is based primarily on four features:

• Synchronous rectification
• Integrated MOSFETs with low on-resistance
• Very low quiescent current
• Pulse-frequency modulation (PFM), or pulse-skipping control, for light loads

2. How a Buck Converter Operates

The following analysis uses a standard asynchronous buck converter as the reference topology. The loss calculations and operating principles are based on this circuit.

Figure 2 | Basic buck converter topology.

Core Function

A buck converter converts a high DC input voltage into a regulated lower DC output voltage. It achieves this by using a MOSFET as a high-frequency PWM switch and an inductor-capacitor network to store, transfer, and release energy.

Two Current Paths

MOSFET On-State

When the PWM signal is high, the MOSFET turns on. The input voltage supplies energy to the inductor, output capacitor, and load, while the inductor current increases approximately linearly. The proportion of each switching cycle during which the MOSFET is on is called the duty cycle, D.

MOSFET Off-State

When the PWM signal is low, the MOSFET turns off. The inductor releases its stored energy through the freewheeling diode to continue supplying the load. The inductor current decreases approximately linearly during this interval, whose duration is represented by 1 ? D.

Ideal Conversion Relationships

When device voltage drops and losses are ignored, the output voltage is determined by the duty cycle:

V_OUT = D × V_IN

For an ideal converter, input and output power are equal:

I_IN = D × I_OUT

Important Loss Relationship

For a switching device, a longer conduction interval generally produces greater conduction loss. In a buck converter, a lower output voltage requires a smaller duty cycle. The freewheeling path therefore conducts for a larger portion of each switching period, increasing diode losses. This is one of the main reasons that low-voltage output power supplies often experience significant heating.

3. Active-Device Losses: MOSFETs and Diodes

MOSFETs and freewheeling diodes are major sources of power loss in a switching converter. Their losses can be divided into conduction losses and switching losses.

MOSFET Conduction Loss

A MOSFET has a finite on-resistance, R_DS(ON), when it is conducting. Current flowing through this resistance produces heat, which is referred to as conduction loss.

Approximate Calculation Using Average Current

A simplified estimate is:

P_COND(MOSFET) = I_MOS(AVG)² × R_DS(ON) × D

This method can produce considerable error because the inductor current is triangular rather than constant. The instantaneous loss is proportional to current squared, so the high-current portion of the waveform contributes disproportionately to total dissipation.

More Accurate Calculation Using the Current Waveform

Using the inductor peak current I_P and valley current I_V, the loss can be calculated by integrating the squared triangular current waveform:

P_COND(MOSFET) = [(I_P³ - I_V³)/3] × R_DS(ON) × D

For the example I_V = 0.25 A, I_P = 1.75 A, R_DS(ON) = 0.1 Ω, and D = 0.5, the average-current estimate gives 0.05 W, while the waveform-based calculation gives 0.089 W. The difference is approximately 78%. Average-current calculations are suitable only when the current ripple and peak-to-average variation are very small.

Methods for Reducing MOSFET Conduction Loss

Power ICs with integrated MOSFETs featuring low R_DS(ON) are often a good starting point. However, a physically larger MOSFET usually has greater parasitic capacitance, which increases switching loss. The selection must therefore balance conduction and switching performance.

Junction temperature also affects R_DS(ON). As the device heats up, its on-resistance generally increases, making thermal design an important part of efficiency optimization. Increasing gate-drive voltage can reduce the MOSFET on-resistance, but it also increases gate-drive power consumption. Neither parameter can be optimized independently.

Diode Conduction Loss

In an asynchronous buck converter, diode losses can be much greater than MOSFET conduction losses. The main limiting parameter is the diode forward voltage, V_F. Diode loss is approximately proportional to forward current and conduction time:

P_COND(DIODE) = I_OUT × V_F × (1 ? V_OUT/V_IN)

Unlike MOSFET conduction loss, which is proportional to the square of current, diode conduction loss is approximately linear with current. Average current is therefore generally adequate for this estimate.

As the buck converter output voltage decreases, the diode conducts for a longer portion of each switching period, and the loss caused by V_F becomes increasingly significant. For a 1.5 V output, even a Schottky diode with a 0.5 V forward drop loses a substantial portion of the output voltage during conduction. This makes the efficiency unacceptable in many low-voltage, high-current applications and explains the importance of synchronous rectification.

Switching Loss

Conduction loss occurs when a device is fully on or fully off. Switching loss occurs during the transition between these states. Because the device voltage and current overlap during the finite switching interval, instantaneous power dissipation is generated, as illustrated in Figure 3.

Figure 3 | Switching loss occurs during the MOSFET turn-on and turn-off transitions.

MOSFET Switching Loss 

As switching frequency increases, the number of transitions per unit time also increases. Switching loss can eventually exceed conduction loss and become the dominant power-loss mechanism.

A commonly used estimate is:

P_SW(MOSFET) = 0.5 × V_IN × I_OUT × [t_SW(ON) + t_SW(OFF)] × f_S

In one example with V_IN = 10 V, V_OUT = 3.3 V, I_OUT = 500 mA, a switching frequency of 1 MHz, and a total transition time of 38 ns, the calculated MOSFET switching loss was approximately 106 mW. The measured waveform indicated 117.4 mW, showing close agreement.

At high switching frequencies, switching loss can account for more than 90% of total power loss in some operating conditions. The MOSFET Miller capacitance, represented by C_GD or C_RSS, strongly influences switching speed. Power MOSFETs with low gate-drain charge, Q_GD, can shorten the transition interval and reduce switching loss.

Diode Reverse-Recovery Loss

A conventional PN-junction diode has reverse-recovery behavior. When it changes from forward conduction to reverse blocking, stored charge inside the junction must be removed. This produces a reverse-current spike, I_RR(PEAK). The reverse voltage and reverse current overlap, creating additional switching loss.

The reverse-recovery loss can be estimated as:

P_SW(DIODE) = 0.5 × V_REVERSE × I_RR(PEAK) × t_RR² × f_S

In a 10 V-to-3.3 V converter delivering 500 mA at 1 MHz, a conventional PN diode can produce more than 300 mW of switching loss, which may greatly exceed its conduction loss.

Figure 4 | When a diode junction becomes reverse-biased, charge accumulated during forward conduction must be released, producing the peak reverse-recovery current I_RR(PEAK).

Diode Selection Considerations

• Standard silicon diodes: V_F is typically 0.7–1.5 V, with reverse-recovery times of several hundred nanoseconds. Their losses can be substantial.
• Ultrafast-recovery diodes: Reverse-recovery time can be reduced to several tens of nanoseconds, but the forward-voltage drop is not significantly improved.
• Schottky diodes: They have almost no reverse-recovery loss and a forward voltage typically around 0.4–1 V. Their limitations include lower voltage and current ratings, as well as higher reverse leakage current.

The conditions are V_IN = 10 V, V_OUT = 3.3 V, I_RR(PEAK) = 250 mA, I_OUT = 500 mA, f_S = 1 MHz, t_RR = 28 ns, and V_F = 0.9 V.

Because of the relatively high V_F and the long diode conduction interval, reverse-recovery loss dominates the diode loss even though the reverse-recovery interval itself is short.

Synchronous Rectification: Eliminating the Main Diode Loss

Synchronous rectification replaces the freewheeling diode with a low-resistance MOSFET. The high-side and low-side MOSFETs switch in a complementary sequence, with dead time arranged to prevent shoot-through.

The diode forward drop V_F is replaced by the MOSFET voltage drop, approximately I × R_DS(ON). This can substantially reduce conduction loss. In one comparison at a 500 mA load and 50% duty cycle, the conventional diode dissipated 225 mW, while the synchronous MOSFET dissipated only 34 mW.

Synchronous rectification requires an additional gate-drive circuit for the low-side MOSFET and therefore introduces some drive loss. Nevertheless, the overall efficiency improvement is generally much greater than the added drive loss. Many high-efficiency power ICs now integrate both synchronous MOSFETs.

4. Passive-Component Losses: Inductors and Capacitors

Power MOSFETs and diodes receive most of the attention during design, but the inductor and capacitors can also make a significant contribution to total loss. Low-quality passive components can reduce system efficiency even when the active devices are carefully selected.

Inductor Losses: Copper Loss and Core Loss

DC Resistance and Copper Loss

The inductor winding has a DC resistance, DCR. The triangular inductor current flowing through this resistance produces heat.

A simplified calculation is:

P_L(DCR) = I_L(AVG)² × DCR

A waveform-based calculation can also be used:

P_L(DCR) = (I_P³ ? I_V³)/3 × DCR

For the same inductance value, a larger inductor and a winding made with thicker wire generally provide lower DCR. A smaller inductance value may also require fewer turns and therefore naturally produce lower winding resistance, although inductance, ripple current, saturation, size, and thermal performance must be evaluated together.

Core Loss

Core loss cannot be calculated using a simple resistive model. It mainly includes hysteresis loss and eddy-current loss.

• Hysteresis loss: Magnetic domains repeatedly change direction during each AC cycle. This repeated magnetization and demagnetization produces heat, with loss related to frequency and flux density.
• Eddy-current loss: The changing magnetic flux induces circulating currents inside the core material. These currents produce I²R heating.

For the core materials considered here, the loss ranking from lower to higher is generally iron-nickel-molybdenum powder core (MPP) followed by iron powder core. Iron powder cores are inexpensive, but their high-frequency core loss can be greater.

Many manufacturers provide online inductor-loss calculators. By entering current, frequency, and voltage conditions, designers can estimate copper and core losses and compare candidate inductors more efficiently.

Capacitor Loss: ESR Is the Key Parameter

Figure 5 | Capacitor loss is commonly simplified using an equivalent series resistance, or ESR, model.

An ideal capacitor has no loss, but a real capacitor includes contact resistance, leakage-current loss, and dielectric polarization loss. These effects are commonly represented by an equivalent series resistance, or ESR.

Capacitor loss can be estimated as:

P_CAP(ESR) = I_CAP(RMS)² × R_ESR

The output capacitor carries the inductor ripple current. A higher ESR therefore increases capacitor heating and simultaneously increases output-voltage ripple.

For capacitors with the same capacitance and voltage rating, ESR generally follows this trend:

Ceramic capacitors < polyester or polypropylene film capacitors < tantalum capacitors < aluminum electrolytic capacitors

• Use low-ESR ceramic MLCCs for input and output filtering when their capacitance, voltage rating, DC-bias behavior, and mechanical constraints are suitable.
• Capacitors with larger capacitance and lower rated voltage generally have lower ESR.
• As switching frequency increases, the overall ESR may decrease slightly, but high-frequency skin effect can increase contact-related resistance loss.

5. Power-IC Architecture and Full-Load-Range Efficiency

Efficiency is determined not only by external component selection. The controller architecture strongly affects light-load and heavy-load performance, especially in battery-powered portable equipment.

Integrated Power Switches

Integrating the high-side and low-side MOSFETs inside the power IC provides two important benefits:

• External MOSFET routing is eliminated, reducing PCB parasitic resistance and inductance while allowing a more compact layout.
• The gate-driver circuit can be optimized specifically for the integrated MOSFETs, reducing the need to tune discrete-device drive parameters.

Very Low Quiescent Current

Quiescent current, I_Q, is the current required by the IC to maintain its internal operating functions.

• Heavy load: Load current is much greater than I_Q, so quiescent current has little influence on overall efficiency.
• Light load or standby: I_Q may represent a large proportion of total input power, causing efficiency to fall sharply.

Phones, wearable products, and Internet-of-Things devices may spend most of their operating time in standby or at low load. These applications benefit from power ICs with microamp-level quiescent current.

PWM for Heavy Loads and PFM for Light Loads

A fixed-frequency PWM controller continues switching at high frequency under light-load conditions, even when the energy delivered per cycle is very small. The resulting switching losses can waste a significant amount of energy.

PFM, also called pulse-skipping or skip-mode control, switches only when needed. Under light load, the inductor stores and releases energy less frequently. When the output voltage falls to the control threshold, the converter initiates another switching cycle. This reduces unnecessary switching and can significantly improve light-load efficiency. Under the stated conditions of 7 V input and 1 mA no-load operation, efficiency can remain above 60%.

Under heavy load, the controller can automatically return to constant-frequency PWM operation, providing lower output ripple and a more predictable noise spectrum. A controller that automatically changes between the two modes can maintain high efficiency across a broad load range.

The trade-off is that the switching frequency in PFM mode changes with load, spreading the noise spectrum and making filtering somewhat more difficult than with fixed-frequency PWM.

6. Practical Checklist for Improving Overall Efficiency

Power-Switch Selection

• Prefer synchronous buck ICs with integrated high-side and low-side MOSFETs having low R_DS(ON).
• For high-frequency operation, select MOSFETs with low Miller charge Q_GD and fast switching transitions.
• For low-voltage, high-current outputs, avoid conventional PN diodes when their V_F loss is unacceptable.

Passive-Component Selection

• For inductors, select windings with low DCR and use low-loss MPP cores when appropriate. Use the manufacturer's tools to estimate core loss.
• For input and output capacitors, use multiple low-ESR ceramic MLCCs in parallel when practical to reduce ripple current, voltage ripple, and heating.

Controller Architecture

• For battery-powered equipment, select a controller with automatic PWM/PFM transition and very low quiescent current.
• For noise-sensitive equipment, fixed-frequency PWM may be preferable. Some light-load efficiency can be sacrificed to obtain a more predictable and easier-to-filter noise spectrum.

Balancing the Main Design Trade-Offs

MOSFET size, switching frequency, on-resistance, and gate-drive power are interdependent. No design can maximize every parameter simultaneously. The correct balance depends on the load range, cost target, thermal requirements, and noise constraints.

• High-power, heavy-load products: Prioritize conduction-loss reduction and consider larger MOSFETs with low R_DS(ON).
• Low-power portable products: Prioritize switching-loss reduction, low quiescent current, and light-load efficiency.

7. Conclusion

Switching power-supply efficiency is determined by five major factors: MOSFET losses, diode losses, inductor losses, capacitor losses, and controller architecture. Achieving efficiency above 95% requires more than optimizing a single component. The topology, power IC, switching devices, passive components, layout, thermal design, and operating-load profile must be considered as one system.

The buck converter provides a useful model for understanding the loss mechanisms and calculation methods found in switching power supplies. The same general reasoning can be applied to other SMPS topologies, including boost and flyback converters, while recognizing that each topology has its own current paths and dominant loss mechanisms.