Surface-mount technology (SMT) has been instrumental in enabling the rapid advancement of electronics manufacturing. Among SMT processes, reflow soldering is one of the most critical for forming reliable interconnects. This article explains the engineering intent of a reflow temperature profile, typical parameter ranges, and how profile choices influence common assembly defects.
The reflow profile for PCB assembly is divided into four major stages: preheat, soak (activation), reflow (time above liquidus), and cooling.
Preheat Zone
The preheat stage raises the assembly from ambient to around 150 °C. The ramp is deliberately controlled to allow solvents and moisture in the solder paste to outgas gradually and to warm electronic components (particularly BGAs and I/O connectors) in a uniform manner in preparation for higher temperatures later in the process. Because components vary widely in size and thermal mass, and pads connect to copper areas of different sizes, they do not all heat at the same rate. To minimize internal and cross-component temperature gradients that can induce warpage or stress, the preheat ramp rate is typically held between 1.5 and 3 °C/s. A controlled, uniform preheat also activates the flux system, as most flux chemistries begin to activate around 150 °C.
A faster ramp helps the flux soften and spread quickly, allowing activators to disperse across the pad area. However, if the ramp is too fast, thermal stress can lead to micro-cracks in MLCCs, PCB warpage, voids, or device damage. Rapid heating can also cause solvent to outgas violently, risking solder paste slump or spattering.
A slower ramp allows more solvent to evaporate and more gases to escape through the paste matrix. This can keep paste viscosity higher prior to reflow and reduce slump. The tradeoff is oxidation: prolonged exposure to elevated temperatures in preheat can reduce flux activity later in the process.
In many ovens, the preheat section occupies roughly one-quarter to one-third of the heated tunnel. Time in preheat depends on the selected ramp. For example, starting from 25 °C:
- At 3 °C/s, time to 150 °C is (150 ? 25)/3 ≈ 42 s.
- At 1.5 °C/s, time to 150 °C is (150 ? 25)/1.5 ≈ 85 s.
Adjust the conveyor speed and zone setpoints to maintain a controlled ramp, often targeting less than about 2 °C/s when component size and thermal mass vary significantly.
Preheat-Related Defects and Mechanisms
1. Slump
Before melting, solder paste behaves as a viscoelastic solid. As temperature rises, viscosity drops and the paste can spread beyond the intended aperture footprint. With a fast ramp, solvents have insufficient time to evaporate and viscosity can drop quickly, increasing slump risk. A gentler ramp allows more solvent to evaporate, helping maintain higher paste viscosity prior to reflow and reducing slump.
2. Solder Beads
Rapidly escaping gases can carry bits of solder paste out from under components with small standoff gaps. These isolated paste islands later melt and emerge from under the component as discrete solder beads.

3. Solder Balls
Excessively fast heating can cause volatile materials in the paste to erupt and spatter, forming small solder spheres around pads. Slowing the ramp reduces this risk, but as with other adjustments, an overly slow ramp increases oxidation and can undermine flux effectiveness later in the profile.
4. Capillary Wicking ("Lamp-Wick" Effect)
Wicking occurs when solder climbs up a lead or termination after wetting, depleting solder from the pad and causing insufficient solder or opens. A common cause is the component termination being hotter than the PCB pad when the paste first melts. Raising the board-side temperature or extending the time near the melting point to equalize pad and lead temperatures before wetting mitigates the issue. Once solder has wetted the pad and formed its initial meniscus, joint shape is largely established and less sensitive to the subsequent heating rate.
5. Poor Wetting
Poor wetting is frequently driven by excessive oxidation of solder particles and pad surfaces due to long preheat exposure. Reducing the thermal load absorbed during preheat can help. If line tact time or other constraints prevent shortening the process, aim for a linear, controlled ramp from room temperature to liquidus to minimize oxidation before reflow.
6. Head-In-Pillow (HIP)
HIP manifests as the component termination resting in molten solder without forming metallurgical bonding. It is often associated with wicking-induced solder depletion or non-wetting due to oxidation. Address wicking as described above, and reduce oxidation through more controlled preheat and soak conditions to restore flux activity and wetting.

7. Tombstoning and Skew
Tombstoning is driven by asymmetric wetting forces when one pad reaches reflow sooner than the other. Extending the time near the paste melting point to achieve temperature balance across both terminations, or reducing the ramp rate, helps synchronize wetting and reduce asymmetrical surface tension. Pad design matters as well: large pad size asymmetry, unequal copper connectivity, or tying one pad to a ground plane without thermal relief while the other pad is thermally isolated will create temperature differentials. When one end melts first, surface tension can lift and stand the chip on end (tombstone) or pull it off-axis (skew).

8. Voids
Voids form when flux volatiles or absorbed moisture vaporize but become trapped in the molten solder and cannot escape before solidification. Excessively rapid heating and large temperature gradients increase the likelihood of trapped gases.
Soak (Activation) Zone
The soak or activation stage is often a near-isothermal segment centered around approximately 150 ± 10 °C, or it may be implemented as a sloped "ramp-to-peak" segment spanning roughly 150 to 190 °C depending on oven capability and assembly complexity. In this interval, paste is approaching melt. Volatiles continue to be driven off, and flux activators engage to remove oxides from pad and component surfaces. Convection equalizes temperatures among components of different size and thermal mass, minimizing board-level temperature differential ΔT.
For simple assemblies without large BGAs or high thermal mass components, a ramp-to-peak profile can be effective, especially in modern ovens that achieve good thermal uniformity. The objective is to ensure that when the paste reaches liquidus, all joints transition into wetting and flow at roughly the same time to produce consistent solder fillets.
The soak interval is often on the order of 60 to 120 s, typically achieved across the second and third heated zones in many ovens. Excessively long soak time can over-evaporate rosin and oxidize solder particles and pads, deactivating flux and producing dull joints, residue discoloration, or opens.
If the soak temperature rises too quickly, flux may outgas violently rather than diffusing through the paste matrix as intended, leading to blowholes, solder spatter, and solder balls. The process window is thus a balance: long enough to activate and equalize, but not so long or so hot that oxidation dominates.
Reflow Zone (Time Above Liquidus, TAL)
The reflow stage brings the assembly above the solder alloy's liquidus temperature and holds it for a controlled duration—TAL. During this period, Sn in the molten solder reacts with Cu or Ni at the pad or finish to form intermetallic compounds (IMCs). For OSP-finished copper, molten tin wets the copper and initially forms the Cu6Sn5 IMC at the interface. A typical acceptable IMC thickness is roughly 1–5 μm, with 1–3 μm often cited as a practical target. Excessive TAL or peak temperature drives continued growth and the formation of Cu3Sn, which is generally undesirable due to increased brittleness. For ENIG finishes, Ni3Sn4 is the dominant IMC, with minimal Cu6Sn5 formation.
Peak temperature in this stage must remain within the thermal capability of the most sensitive components and their rated heating rates. For example, a typical lead-free rated tantalum capacitor may allow a 260 °C peak for no more than about 10 s. Ideally, all joints on the assembly reach a similar peak at a similar time, minimizing temperature gradients across the board and among components.
As a rule of thumb, the peak temperature is commonly set about 25–30 °C above the solder's melting point to ensure complete reflow and wetting. If the peak is too low, cold solder joints and poor wetting are likely.
Cooling Zone
After reflow, controlled cooling solidifies the joints. Cooling rate significantly influences microstructure and reliability. Rapid cooling promotes finer solder grain structure, shinier fillets, and higher joint strength, but increases the risk of trapped gases becoming voids if the path for escape is limited. Extremely fast cooling can also impose thermal shock on components and joints.
Conversely, slow cooling above liquidus prolongs TAL, encourages excessive IMC growth, and coarsens the solder microstructure, reducing fatigue strength. Using a relatively faster cooling rate helps suppress IMC thickening and maintain a fine-grained solder matrix.
Cooling rate must also respect component shock limits. Many capacitors, for example, specify a maximum allowable cooling rate around 4 °C/s. Exceeding component limits can induce cracks or cause pad-to-board or pad-to-joint separation due to differences in coefficients of thermal expansion and contraction among the component, solder, and PCB. A commonly recommended cooling slope is in the range of approximately 2–5 °C/s, tuned to the assembly's materials and component sensitivities.
In summary, a robust reflow profile balances solvent removal, flux activation, temperature uniformity, controlled time above liquidus, and an appropriate cooling rate. Profile development should be guided by the solder paste supplier's specifications, component thermal limits, PCB design factors such as pad geometry and copper distribution, and empirical verification using thermocouples at critical points on the assembly. Understanding the mechanisms behind slump, solder beads, solder balls, wicking, poor wetting, HIP, tombstoning, and voids helps target the correct profile adjustments and design changes to prevent those defects.