PCB Layout Principles and SMD Manufacturing Requirements

PCB layout is the stage where a circuit description becomes a physical assembly. Placement decisions define the available routing channels, the shape of power distribution, the distance between components, and the ease with which the board can be assembled and tested. Once routing begins, many of these decisions become expensive to reverse. This article covers the basic principles that govern layout, the sequence used to place components from board outline to datum points, and the process-related spacing requirements that apply to SMD components. It is intended for PCB designers, hardware engineers, and signal integrity engineers who need a practical placement framework before detailed routing starts.

Highlights:

• Layout must satisfy structural, keep-out, power-channel, routing, manufacturability, testability, and customer requirements at the same time; these constraints are checked before detailed routing.
• A repeatable placement sequence starts with the board outline and component keep-in area, then moves to structurally constrained parts, critical signals, clock/control/power systems, length-matching space, and board datum points.
• SMD-to-SMD spacing requirements can differ by package and object type; the process table in this part distinguishes outline-to-outline, outline-to-pad, and BGA/CSP or SOP-type combinations.

2 Layout

Layout is the first physical realization step after schematic capture and mechanical definition. It establishes the placement grid on which routing, power delivery, and assembly clearances depend. The following sections set out the principles to check, the order in which to apply them, and the process spacing rules that constrain the result.

Basic Principles of Layout

Placement has to satisfy several classes of requirement at the same time. A board that is mechanically correct can still be unmanufacturable, and a board with generous routing space can still fail test or rework. The basic principles below are therefore evaluated as a set, not as isolated checks.

1. Meet structural requirements. The board outline, mounting features, connector positions, and height restrictions come from the mechanical design. Placement must fit those constraints before any electrical optimization is attempted. If a component conflicts with a structural feature, the conflict should be resolved at placement rather than deferred to routing.
2. Meet keep-out areas. Keep-out areas include the placement and routing restrictions created by the structure and by special devices. The board also needs a component keep-in boundary, a region inside which components are allowed. The general keep-in boundary is 5mm from the board edge, identified as Area/Package Keep in. Other areas with special requirements are defined as Area/Package Keep out. Both types of boundary must be drawn and respected during placement.
3. Meet power channels. Power delivery needs physical channels from source to load. Placement should leave room for the copper paths, vias, and plane connections that carry current. If power channels are treated as an afterthought, the resulting routing may force narrow paths or long detours.
4. Meet routing channels for critical components, critical signals, local density, and the whole board. Critical components and critical signals need short, direct, or controlled paths. Locally dense areas need enough escape space, and the whole board needs a routing channel plan. Placement should not consume the space that these channels require.
5. Meet manufacturability requirements: component spacing, orientation, etc. Assembly equipment and processes impose spacing and orientation rules. Components need clearance for placement, solder access, and inspection. The process table later in this article gives an example of SMD-to-SMD spacing requirements.
6. Meet testability requirements: easy to inspect and rework. Test points, probe access, and rework clearance depend on placement. A component that is electrically correct but inaccessible for inspection or replacement creates a production and service problem. Placement should preserve access to pads, leads, and test features.
7. Meet other relevant requirements, including customer requirements. Customer specifications and program-specific rules may add constraints beyond the general principles. These requirements must be identified before placement is frozen, because they can affect spacing, orientation, and keep-out definitions.

Basic Layout Sequence

The sequence below converts the principles into an order of work. It starts with fixed mechanical constraints and progressively adds electrical and process constraints. Following this order reduces the chance that a later placement change will invalidate an earlier decision.

1. Draw the board outline from the mechanical drawing. Use the mechanical drawing to define the board frame. If the board has openings or cutouts, draw their positions as well. The outline is the reference for every subsequent keep-in and keep-out boundary.
2. Draw the whole-board component keep-in area, generally 5mm from the board edge (Area/Package Keep in), and draw other keep-out areas with special requirements (Area/Package Keep out). This step establishes where components may and may not be placed. The general keep-in boundary is normally 5mm from the board edge. Special keep-out areas are added where the structure or a particular device imposes a restriction.
3. Place components with structural requirements according to the mechanical drawing. Connectors, switches, displays, mounting hardware, and other mechanically constrained parts are placed next. Their positions are driven by the enclosure and cannot be optimized freely for routing.
4. Make an overall placement plan and place critical-signal components according to the main signal flow. At this stage the designer plans the major flow across the board and places the components that carry critical signals. The plan should show the intended direction of signal travel and the space reserved for the main routes.
5. Give priority to the layout of clock, control, and power systems; plan primary and secondary power; consider the approximate split of each power on the power plane layer; and consider sufficient routing channels between components. Clock, control, and power systems set the architecture of the board. Their placement should be considered early. The primary and secondary power distribution needs a rough plane split, and the space between components must leave room for the routing channels that connect these systems.
6. Consider devices with topology requirements and reserve enough space for length-matched routing of signals with length requirements. Some interfaces and buses have topology constraints, and some signals have length requirements. Placement must leave space for the required topology and for the detours used to match length. This space is difficult to recover after components are fixed.
7. Place the board datum/reference points. Board datum or reference points provide the coordinate reference for fabrication, assembly, and inspection. They are placed as part of the layout so that the final board has a consistent reference system.

Process Requirements for Layout

Process requirements convert the electrical placement into a manufacturable one. For SMD components, the spacing between component bodies and pads depends on the object types involved. Common requirements from Japanese customers for SMD component-to-SMD component spacing are summarized in the table below.

The table groups the requirements by object type. Cases A through E cover ordinary component outlines and pads. In A, B, D, and E the object on both sides is a component outline; in C the second object is a component pad. All five use the spacing value 0.4/16. Cases F through I involve BGA/CSP or SOP etc. outlines. F places a BGA/CSP outline against a chip outline, G against another BGA/CSP outline, H against an SOP etc. outline, and I places an SOP etc. outline against another SOP etc. outline. These four cases use the spacing value 5/200. The applicable row is selected by the package type and by whether the adjacent object is an outline or a pad.

The spacing relationships are illustrated below.

Figure 3 | Schematic diagram of component spacing 1

Figure 4 | Schematic diagram of component spacing 2

Related Reading: 

• PCB Layout Rules: Edge Clearance, Keep-Outs and Fiducial Marks
• Clock Circuit Layout and Routing for Crystals and Oscillators
• Interface Circuit Layout and Routing Guide for PCB Designers
• PCB Routing Process and Power/Ground Handling Basics
• Fanout Design Methods for PCB BGA, Power, and Connectors
• Common Signal Types in PCB Design: Digital, Analog, and Interface
• PCB Silkscreen Text Design and RF/AD-DA Layout Rules for Engineers